MT28F160C34 Datasheet, PDF (24/28 Pages) Micron Technology – FLASH MEMORY

V_IH
A0–A19
V_IL
V_IH
CE#
V_IL
V_IH
OE# _VIL
V_IH
WE# _VIL
DQ0–DQ15 ^VIH
V_IL
V_IH
RP# _VIL
V_IH
WP# _VIL
V_PPH
VPP
V_IL
ADVANCE
1 MEG x 16
3V ENHANCED+ BOOT BLOCK FLASH MEMORY
WRITE/ERASE CYCLE
WE#-CONTROLLED WRITE/ERASE
Note 1
tAS
tAH
AIN
tAS
tAH
tCS
t _WP
tDS
tRS
tCH
t _WPH
tOHH
tWED1, _{2, 3, 4}
CMD
in
tDH
tDS
tWB
tDH
CMD/
Data-in
Status
(SR7=0)
tWHS
[Unlock soft-protected blocks]
Status
(SR7=1)
tWHH
tVPS
tVPH
CMD
in
WRITE SETUP or
ERASE SETUP
input
WRITE or block
address asserted, and
WRITE data or ERASE
CONFIRM
WRITE or ERASE
executed, status register
checked for completion
Command for next
operation issued
DON’T CARE
TIMING PARAMETERS
SYMBOL
t_WPH
t_WP
t_AS
t_AH
t_DS
t_DH
t_CS
t_CH
t_VPS
t_RS
-9
MIN
30
70
70
0
50
0
0
0
200
150
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
t_WED1
t_WED2
t_WED3
t_WED4
t_VPH
t_WB2
t_WHS
t_WHH
t_OHH
-9
MIN
6
0.5
0.5
1
0
200
0
0
30
UNITS
µs
s
s
s
ns
ns
ns
ns
ns
NOTE: 1. Address inputs are “Don’t Care” but must be held stable.
2. ^tWB = 800ns (MAX).
1 Meg x 16 3V Enhanced+ Boot Block Flash Memory
MT28F160C34_3.p65 – Rev. 3, Pub. 8/01
24
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©2001, Micron Technology, Inc.