MT36HTJ51272-P Datasheet, PDF (12/14 Pages) Micron Technology – DDR2 SDRAM Registered DIMM (RDIMM)

4GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM
Serial Presence-Detect
Table 14: Serial Presence-Detect Matrix
“1”/“0”: serial data, “driven to HIGH”/“driven to LOW”
Byte
0
1
2
3
4
5
6
7
8
9
Description
Number of SPD bytes used by Micron
Total number of bytes in SPD device
Fundamental memory type
Number of row addresses on SDRAM
Number of column addresses on SDRAM
DIMM height and module ranks
Module data width
Reserved
Module voltage interface levels
SDRAM cycle time, ^tCK
(CL = MAX value, see byte 18)
10
SDRAM access from clock,^tAC
(CL = MAX value, see byte 18)
11 Module configuration type
12 Refresh rate/type
13 SDRAM device width (primary SDRAM)
14 Error-checking SDRAM data width
15 Reserved
16 Burst lengths supported
17 Number of banks on SDRAM device
18 CAS latencies supported
19 Module thickness
20 DDR2 DIMM type
21 SDRAM module attributes
22 SDRAM device attributes: weak driver (01) or, weak driver
and 50Ω ODT (03)
23
SDRAM cycle time, ^tCK, MAX CL - 1
24
SDRAM access from CK, ^tAC, MAX CL - 1
25
SDRAM cycle time, ^tCK, MAX CL - 2
26
SDRAM access from CK, ^tAC, MAX CL - 2
27
MIN row precharge time, ^tRP
28
MIN row active-to-row active, ^tRRD
29
MIN RAS#-to-CAS# delay, ^tRCD
30
MIN RAS# pulse width, ^tRAS
31 Module rank density
Entry (Version)
128
256
DDR2 SDRAM
14
11
30mm, dual rank
72
0
SSTL 1.8V
-667
-53E
-40E
-667
-53E
-40E
ECC
ECC and parity (P)
7.81µs/SELF
4
4
4, 8
8
-667 (5, 4, 3)
-53E/-40E (4, 3)
Registered DIMM
1 PLL, 2 Registers
-667
-53E/-40E
-667
-53E/-40E
-667
-53E
-40E
-667
-53E/-40E(N/S)
-667
-53E/-40E(N/S)
-667/
-53E/-40E
-667/
-53E/-40E
-667/-53E
-40E
2GB
MT36HTJ51272(P)
80
08
08
0E
0B
61
48
00
05
30
3D
50
45
50
60
02
06
82
04
04
00
0C
08
38
18
03
01
05
03
01
3D
50
45
50
60
50
00
45
00
3C
3C
1E
3C
3C
2D
28
02
PDF: 09005aef822553c2/Source: 09005aef822553af
HT36HTJ51272.fm - Rev. B 7/06 EN
12
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©2003 Micron Technology, Inc. All rights reserved.