RV-4162 Datasheet, PDF (23/39 Pages) MICORO CRYSTAL SWITZERLAND – Ultra Small Real Time Clock

Micro Crystal
Ultra Small Real Time Clock / Calendar Module
RV-4162
4.7. OSCILLATOR STOP DETECTION
If the oscillator fail (OF) bit is internally set to a “1”, this indicates that the oscillator has either stopped, or was
stopped for some period of time and can be used to judge the validity of the clock and date data. This bit will be set
to “1” any time the oscillator stops.
In the event the OF bit is found to be set to “1” at any time other than the initial power-up, the STOP bit (OS) should
be written to a “1”, then immediately reset to “0”. This will restart the oscillator.
The following conditions can cause the OF bit to be set:
 The first time power is applied (defaults to a “1” on power-up)
Note: if the OF bit cannot be written to “0” four (4) seconds after the initial power-up, the STOP bit (OS)
should be written to a “1”, then immediately reset to “0”.
 The voltage present on V_DD or battery is insufficient to support oscillation
 The OS bit is set to “1”
If the oscillator fail interrupt enable bit (OFIE) is set to a “1”, the INT pin 6 will also be activated. The INT output is
cleared by resetting the OFIE or OF bit to “0” (NOT by reading the Flag register).
The OF bit will remain set to “1” until written to logic “0”. The oscillator must start and have run for at least 4
seconds before attempting to reset the OF bit to “0”. If the trigger event occurs during a power-down condition, this
bit will be set correctly.
4.8. OUTPUT DRIVER PIN
When the OFIE bit, AFE bit, and Watchdog register are not set to generate an interrupt, the INT pin 6 becomes an
output driver that reflects the contents of bit 7 (OUT bit) of the Freq. Compensation register. In other words, when
bit 7 (OUT bit) is a “0”, then the INT pin 6 will be driven low.
Note: The INT pin 6 is an open-drain which requires an external pull-up resistor.
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