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RV-4162 Datasheet, PDF (18/39 Pages) MICORO CRYSTAL SWITZERLAND – Ultra Small Real Time Clock
Micro Crystal
Ultra Small Real Time Clock / Calendar Module
RV-4162
4.2.1.FREQUENCY OFFSET COMPENSATION METHOD
The frequency compensation itself occurs within a 64 minute cycle. Each binary coded calibration value will trigger
two compensation events; compensation events are applied once per minute until the programmed calibration
value has been implemented. If, for example a binary “1” is loaded into the Frequency Compensation Register, only
the first 2 minutes in the 64 minute cycle will contain one compensation event each. If a binary ‘6’ is loaded, the first
12 minutes will be affected, and so on.
Each compensation event either shortens one second by 7.8 ms (256 x 32.768 kHz oscillator clock cycles) or
lengthened it by 3.9 ms (128 x 32.768 kHz oscillator clock cycles). Therefore, each calibration value triggers two
compensation events resulting in a time adjustment of -2.034 ppm (slower by -0.175 seconds per day) or +4.068
ppm (faster by +0.351 seconds per day) for each of the 31 values of the calibration value.
The maximum calibration value (31d) defines the compensation range of -63.054 ppm (slower by -5.449 seconds
per day) or +126.108 ppm (faster by +10.899 seconds per day).
32.768 kHz Clock
256 Hz Clock
Oscillator
32.768 kHz
Clock
Frequency
Divider
Chain
128 Hz Clock 1
Positive Compensation Event
128 Hz +1 Clock
1
Negative Compensation Event
128 Hz -1 Clock
1
2
2
2
3
1
2
3
4
+7.8 ms
+2.034 ppm
4
-3.9 ms
-1.017 ppm
3
4
1
Negative compensation (when 32.768 kHz clock too fast):
Then for each compensation event, a clock pulse at the 128 Hz divider stage is suppressed to
compensate the frequency deviation of the 32.768 kHz clock.
2
Positive compensation (when 32.768 kHz clock too slow):
Then for each compensation event a clock pulse at the 128 Hz divider stage is added to compensate the
frequency deviation of the 32.768 kHz clock.
Note that frequency compensation events do not affect the frequency at CLKOUT pin 2.
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