DSPIC33FJ32MC202 Datasheet, PDF (97/292 Pages) Microchip Technology – High-Performance, 16-bit Microcontrollers

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
7.0 OSCILLATOR
CONFIGURATION
Note:
This data sheet summarizes the features
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC33F
Family Reference Manual”. Please see
the Microchip web site (www.micro-
chip.com) for the latest dsPIC33F Family
Reference Manual sections.
The
dsPIC33FJ32MC202/204
and
dsPIC33FJ16MC304 oscillator system provides:
• External and internal oscillator options as clock
sources
• An on-chip Phase-Locked Loop (PLL) to scale the
internal operating frequency to the required
system clock frequency
• An internal FRC oscillator that can also be used
with the PLL, thereby allowing full-speed opera-
tion without any external clock generation hard-
ware
• Clock switching between various clock sources
• Programmable clock postscaler for system power
savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and takes fail-safe measures
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
selection.
A simplified diagram of the oscillator system is shown
in Figure 7-1.
FIGURE 7-1:
OSCO
OSCI
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304 OSCILLATOR SYSTEM DIAGRAM
dsPIC33F
Primary Oscillator
XT, HS, EC
S2
DOZE<2:0>
S3
XTPLL, HSPLL,
ECPLL, FRCPLL
S1
PLL⁽¹⁾
S1/S3
FCY
FRC
Oscillator
TUN<5:0>
FRCDIV<2:0>
÷ 16
SOSCO
SOSCI
LPRC
Oscillator
Secondary Oscillator
LPOSCEN
Note 1: See Figure 7-2 for PLL details.
÷2
FRCDIVN _S7
FOSC
FRCDIV16 _S6
FRC _S0
LPRC
S5
SOSC
S4
Clock Fail Clock Switch Reset
S7
NOSC<2:0> FNOSC<2:0>
WDT, PWRT,
FSCM
Timer 1
© 2007 Microchip Technology Inc.
Preliminary
DS70283B-page 95