TC530 Datasheet, PDF(9/22 Page) TelCom Semiconductor, Inc – 5V PRECISION DATA ACQUISITION SUBSYSTEMS

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TC530 Datasheet, PDF (9/22 Pages) TelCom Semiconductor, Inc – 5V PRECISION DATA ACQUISITION SUBSYSTEMS

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TC530/TC534

FIGURE 3-2:

SERIAL PORT TIMING

R/W

EOC

Read Timing

TRD

TRS

R/W

DOUT

DCLK

TDRS

TPWL

DIN

DCLK

Write Timing

TLS

TDLSTPWL

R/W

EOC

Read Format

Write Default Timing

R/W

DIN

TLDL

TLDS

DOUT

EOC OVR SGN MSB

LSB

DCLK

Write Format

R/W

DOUT

MSB

LSB

DCLK

For Polled vs Interrupt Operation and Write Value Modified Cycle Use TC520A Data Sheet (DS21431).

FIGURE 3-3:

A/D CONVERTER TIMING

Conversion

Phase

INT

Data to Serial

Port Transmit

EOC

Updated Data

Ready

TDR

DINT

Updated Data

Ready

3.3 Input Integrate Phase (INT)

In this phase, a current directly proportional to differen-

tial input voltage is sourced into integrating capacitor

CINT. The amount of voltage stored on CINT at the end

of the INT phase is directly proportional to the applied

differential input voltage. Input signal polarity (sign bit)

is determined at the end of this phase. Converter

resolution and speed is a function of the duration of the

INT phase, which is programmable by the user via the

serial port (see Section 4.1.1, AZ and INT Phase Dura-

tion). The shorter the integration time, the faster the

speed of conversion (but the lower the resolution).

Conversely, the longer the integration time, the greater

the resolution (but at slower the speed of conversion).

DS21433B-page 9

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