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TC530 Datasheet, PDF (13/22 Pages) TelCom Semiconductor, Inc – 5V PRECISION DATA ACQUISITION SUBSYSTEMS
5.0 SELECTING COMPONENT
VALUES FOR THE
TC530/TC534
1. Calculate Integrating Resistor (RINT)
The desired full scale input voltage and amplifier
output current capability determine the value of
RINT. The buffer and integrator amplifiers each
have a full scale current of 20µA. The value of RINT
is therefore directly calculated as follows:
EQUATION 5-1:
where:
VINMAX
RINT = 20
mΩ
VIN(MAX) = Maximum Input Voltage (full count voltage)
RINT = Integrating Resistor (in mΩ)
For loop stability, RINT should be ≥ 50kΩ.
2. Select Reference (CREF) and Auto Zero (CAZ)
Capacitors
CREF and CAZ must be low leakage capacitors
(such as polypropylene). The slower the conver-
sion rate, the larger the value CREF must be. Rec-
ommended capacitors for CREF and CAZ are
shown in Table 5-1. Larger values for CAZ and
CREF may also be used to limit rollover errors.
TABLE 5-1: CREF AND CAZ SELECTION
Conversion Typical Value of
Per Second CREF, CAZ (µF)
Suggested* Part
Number
>7
0.1
SMR5 104K50J0IL
2 to 7
0.22
SMR5 224K50J2L
2 or less
0.47
SMR5 474K50J04L
Note: *Manufactured by Evox-Rifa, Inc.
5.1 Calculate Integrating Capacitor
(CINT)
The integrating capacitor must be selected to maximize
integrator output voltage swing. The integrator output
voltage swing is defined as the absolute value of VDD
(or VSS) less 0.9V (i.e.,IVDD – 0.9VI or IVSS +0.9VI).
Using the 20µA buffer maximum output current, the
value of the integrating capacitor is calculated using the
following equation.
EQUATION 5-2:
CINT =(TINT) (20 x 10 -6) µF
(VS - 0.9)
where: TINT = Integration Period
VS = IVDDI
CINT = Integrated Capacitor Value (µF).
TC530/TC534
It is critical that the integrating capacitor have a very
low dielectric absorption. PPS capacitors are an exam-
ple of one such dielectric. Table 5-2 summarizes
various capacitors suitable for CINT.
TABLE 5-2:
RECOMMENDED CAPACITOR
FOR CINT
Value (µF)
Suggested Part Number*
Note:
0.1
SMR5 104K50J0IL
0.22
SMR5 224K50J2L
0.33
SMR5 334K50J03L4
0.47
SMR5 474K50J04L
*Manufactured by Evox-Rifa, Inc.
5.2 Calculate VREF
The reference de-integration voltage is calculated
using the following equaton:
EQUATION 5-3:
VREF = (VS – 0.9) (CINT) (RINT) V
2(RINT)
5.3 Serial Port
Communication with the TC530/TC534 is accom-
plished over a 3 wire serial port. Data is clocked into
DIN on the rising edge of DCLK and clocked out of DOUT
on the falling edge of DCLK. R/W must be HIGH to read
converted data from the serial port and LOW to write
the LOAD VALUE to the TC530/TC534.
5.4 Data Read Cycle
Data is shifted out of the serial port in the following
order: End of Conversion (EOC), Overrange (OVR),
Polarity (POL), conversion data (MSB first). When R/W
is high, the state of the EOC bit can be polled by simply
reading the state of DOUT. This allows the processor to
determine if new data is available without connecting
an additional wire to the EOC output pin (this is espe-
cially useful in a polled environment). See Figure 5-1.
FIGURE 5-1:
SERIAL PORT DATA
READ CYCLE
R/W
DCLK
DOUT
EOC OVR POL MSB LSB
© 2002 Microchip Technology Inc.
DS21433B-page 13