TCM1617 Datasheet, PDF (8/14 Pages) Microchip Technology – SMBus Thermal Sensor with External Diode Input

SMBus Thermal Sensor with External Diode Input
TCM1617
The Serial Clock input (SCL) and bi-directional data port
(SDA) form a 2-wire bi-directional serial port for program-
ming and interrogating the TCM1617. The following conven-
tions are used in this bus architecture:
All transfers take place under control of a host, usually
a CPU or microcontroller, acting as the Master, which
one or more data bytes. The device address byte includes
a Read/Write selection bit. Each access must be terminated
by a Stop Condition (STOP). A convention called (ACK)
confirms receipt of each byte. Note that SDA can change
only during periods when SCL is LOW (SDA changes while
SCL is High are reserved for Start and Stop conditions.)
ADD0
0
0
0
open (3-state)
open (3-state)
open (3-state)
1
1
1
Address Decode Table
ADD1
0
open (3-state)
1
0
(open (3-state)
1
0
open (3-state)
1
SMBus Address
0011 000
0011 001
0011 010
0101 001
0101 010
0101 011
1001 100
1001 101
1001 110
provides the clock signal for all transfers. The TCM1617
always operates as a slave. The serial protocol is illustrated
in Figure 3. All data transfers have two phases; all bytes are
transferred MSB first. Accesses are initiated by a start
condition (START), followed by a device address byte and
Start Condition (START)
The TCM1617 continuously monitors the SDA and SCL
lines for a start condition (a High to Low transition of SDA
while SCL is High), and will not respond until this condition
is met.
Address Byte
Immediately following the Start Condition, the host must
transmit the address byte to the TCM1617. The states of
ADD1 and ADD0 during power-up determine the 7-bit
SMBus address for the TCM1617. The 7-bit address trans-
mitted in the serial bit stream must match for the TCM1617
to respond with an Acknowledge (indicating the TCM1617 is
on the bus and ready to accept data). The eighth bit in the
Address Byte is a Read-Write Bit. This bit is 1 for a read
operation or 0 for a write operation.
TCM1617 Serial Bus Conventions
Term
Transmitter
Receiver
Master
Slave
Start
Stop
ACK
Busy
NOT Busy
Data Valid
Explanation
The device sending data to the bus.
The device receiving data from the bus.
The device which controls the bus: initiating
transfers (START), generating the clock, and
terminating transfers (STOP).
The device addressed by the master.
A unique condition signaling the beginning of
a transfer indicated by SDA falling (High – Low)
while SCL is high.
A unique condition signaling the end of a
transfer indicated by SDA rising (Low – High)
while SCL is high.
A receiver acknowledges the receipt of each
byte with this unique condition. The receiver
drives SDA low during SCL high of the ACK
clock-pulse. The Master provides the clock
pulse for the ACK cycle.
Communication is not possible because the
bus is in use.
When the bus is idle, both SDA and SCL
will remain high.
The state of SDA must remain stable during
the High period of SCL in order for a data bit to
be considered valid. SDA only changes state
while SCL is low during normal data transfers
(see Start and Stop conditions.)
Acknowledge (ACK)
Acknowledge (ACK) provides a positive handshake
between the host and the TCM1617. The host releases SDA
after transmitting eight bits, then generates a ninth clock
cycle to allow the TCM1617 to pull the SDA line Low to
acknowledge that it successfully received the previous eight
bits of data or address.
Data Byte
After a successful ACK of the address byte, the host
must next transmit the data byte to be written or clock out the
data to be read. (See the appropriate timing diagrams.) ACK
will be generated after a successful write of a data byte into
the TCM1617.
TCM1617-1 2/5/99
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 2001 Microchip Technology Inc. DS21485A