PIC18F67J50-I Datasheet, PDF (8/16 Pages) Microchip Technology – PIC18F87J50 Family Silicon Errata and Data Sheet Clarification

PIC18F87J50 FAMILY
5. Module: Section 19.3 “SPI Mode” and
Section 19.4 “I²C™ Mode”
In Section 19.3 “SPI Mode” on page 231 and
Section 19.4 “I²C™ Mode” on page 241, the
following note is added to describe the procedure
to disable the MSSP module:
Note:
Disabling the MSSP module by clearing
the SSPEN bit (SSPxCON1<5>) may not
reset the module. It is recommended to
clear the SSPxSTAT, SSPxCON1 and
SSPxCON2 registers and select the mode
prior to setting the SSPEN bit to enable
the MSSP module.
6. Module: Figure 19-10: I²C™ Slave Mode
Timing (Transmission, 7-Bit
Address)
On page 252, the figure is replaced with the new
timing diagram provided in Figure 19-10.
DS80481A-page 8
© 2009 Microchip Technology Inc.