USB3320 Datasheet, PDF (54/70 Pages) Microchip Technology – Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver

USB3320
7.1.1.13 Scratch Register
Address = 16-18h (read), 16h (write), 17h (set), 18h (clear)
Field Name
Scratch
Bit Access
7:0 rd/w/s/c
Default
00h
Description
Empty register byte for testing purposes. Software can
read, write, set, and clear this register and the
transceiver functionality will not be affected.
7.1.2 CARKIT CONTROL REGISTERS
The following registers are used to set-up and enable the USB UART and USB Audio functions.
7.1.2.1 Carkit Control
Address = 19-1Bh (read), 19h (write), 1Ah (set), 1Bh (clear)
This register is used to program the USB3320 into and out of the Carkit Mode. When entering the UART mode the Link
must first set the desired TxdEn and the RxdEn bits and then transition to Carkit Mode by setting the CarkitMode bit in
the Interface Control Register. When RxdEn is not set then the DATA[1] pin is held to a logic high.
Field Name
CarkitPwr
IdGndDrv
TxdEn
RxdEn
SpkLeftEn
SpkRightEn
MicEn
Reserved
Bit Access
0
rd
1
rd/w/s/c
2
rd/w/s/c
3
rd/w/s/c
4
rd/w/s/c
5
rd/w/s/c
6
rd/w/s/c
7
rd
Default
0b
0b
0b
0b
0b
0b
0b
0b
Description
Read only, 0.
Drives ID pin to ground
Connects UART TXD (DATA[0]) to DM
Connects UART RXD (DATA[1]) to DP
Connects DM pin to SPK_L pin
Connects DP pin to SPK_R pin. See Note below.
Connects DP pin to SPK_R pin. See Note below.
Read only, 0.
Note: If SpkRightEn or MicEn are asserted the DP pin will be connected to SPK_R. To disconnect the DP pin
from the SPK_R pin both SpkrRightEn and MicEn must be set to de-asserted.
If using USB UART mode the UART data will appear at the SPK_L and SPK_R pins if the corresponding SpkLeftEn,
SpkRightEn, or MicEn switches are enabled.
If using USB Audio the TxdEn and RxdEn bits should not be set when the SpkLeftEn, SpkRightEn, or MicEn switches
are enabled. The USB single-ended receivers described in Section 5.2.1 are disabled when either SpkLeftEn,
SpkRightEn, or MicEn are set.
7.1.2.2 Carkit Interrupt Enable
Address = 1D-1Fh (read), 1Dh (write), 1Eh (set), 1Fh (clear)
Field Name
IdFloatRise
IdFloatFall
CarIntDet
CarDpRise
CarDpFall
Bit Access
0
rd/w/s/c
1
rd/w/s/c
2
rd
3
rd
4
rd
Default
0b
0b
0b
0b
0b
Description
When enabled an interrupt will be generated on the
alt_int of the RXCMD byte when the ID pin transitions
from non-floating to floating. The IdPullup bit in the
OTG Control register should be set.
When enabled an interrupt will be generated on the
alt_int of the RXCMD byte when the ID pin transitions
from floating to non-floating. The IdPullup bit in the
OTG Control register should be set.
Not Implemented. Reads as 0b.
Not Implemented. Reads as 0b.
Not Implemented. Reads as 0b.
DS00001792B-page 54
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