USB3320 Datasheet, PDF (50/70 Pages) Microchip Technology – Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver

USB3320
7.1.1 ULPI REGISTER SET
The following registers are used for the ULPI interface.
7.1.1.1 Vendor ID Low
Address = 00h (read only)
Field Name
Bit
Vendor ID Low
7:0
7.1.1.2 Vendor ID High
Address = 01h (read only)
Access
rd
Default
Description
24h
Microchip Vendor ID
Field Name
Bit
Vendor ID High
7:0
7.1.1.3 Product ID Low
Address = 02h (read only)
Access
rd
Default
Description
04h
Microchip Vendor ID
Field Name
Bit
Product ID Low
7:0
7.1.1.4 Product ID High
Address = 03h (read only)
Access
rd
Default
Description
07h
Microchip Product ID
Field Name
Product ID High
Bit Access
7:0
rd
Default
Description
00h
Microchip Product ID
7.1.1.5 Function Control
Address = 04-06h (read), 04h (write), 05h (set), 06h (clear)
Field Name
XcvrSelect[1:0]
TermSelect
OpMode
Bit Access
1:0 rd/w/s/c
2
rd/w/s/c
4:3 rd/w/s/c
Default
01b
0b
00b
Description
Selects the required transceiver speed.
00b: Enables HS transceiver
01b: Enables FS transceiver
10b: Enables LS transceiver
11b: Enables FS transceiver for LS packets (FS
preamble automatically pre-pended)
Controls the DP and DM termination depending on
XcvrSelect, OpMode, DpPulldown, and DmPulldown.
The DP and DM termination is detailed in Table 5-1.
Selects the required bit encoding style during transmit.
00b: Normal Operation
01b: Non-Driving
10b: Disable bit-stuff and NRZI encoding
11b: Reserved
Reset
5
rd/w/s/c
0b
Active high transceiver reset. This reset does not reset
the ULPI interface or register set. Automatically clears
after reset is complete.
DS00001792B-page 50
 2014-2015 Microchip Technology Inc.