PIC16F882_12 Datasheet, PDF (54/338 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers

PIC16F882/883/884/886/887
FIGURE 3-10:
BLOCK DIAGRAM OF RB<7:4>
Analog⁽¹⁾ Input Mode
Data Bus
DQ
WR
WPUB
CK _Q
RBPU
RD
WPUB
WR
PORTB
DQ
CK _Q
CCP1OUT Enable
CCP1OUT ₁₀₁
010
WR
TRISB
DQ
CK _Q
VDD
Weak
VDD
I/O Pin
VSS
RD
TRISB
RD
PORTB
WR
IOCB
RD
IOCB
DQ
CK _Q
Interrupt-on-
Change
Analog⁽¹⁾
Input Mode
QD
EN
Q3
QD
EN
RD PORTB
To Timer1 T1G⁽³⁾
To A/D Converter
To ICSPCLK (RB6) and ICSPDAT (RB7)
Available on PIC16F882/PIC16F883/PIC16F886 only.
Note 1:
2:
3:
ANSELH determines Analog Input mode.
Applies to RB<7:6> pins only).
Applies to RB5 pin only.
ICSP™⁽²⁾
TABLE 3-2: SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
ANSELH
—
—
ANS13 ANS12 ANS11 ANS10 ANS9 ANS8
50
CCP1CON
P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 128
CM2CON1 MC1OUT MC2OUT C1RSEL C2RSEL —
—
T1GSS C2SYNC
96
IOCB
IOCB7 IOCB6 IOCB5 IOCB4 IOCB3 IOCB2 IOCB1 IOCB0
51
INTCON
GIE
PEIE
T0IE
INTE RBIE
T0IF
INTF
RBIF
33
OPTION_REG RBPU INTEDG T0CS T0SE
PSA
PS2
PS1
PS0
32
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
50
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
50
WPUB
WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0
51
Legend: x = unknown, u = unchanged, — = unimplemented read as ‘0’. Shaded cells are not used by PORTB.
DS41291G-page 54
 2006-2012 Microchip Technology Inc.