PIC16F882_12 Datasheet, PDF (153/338 Pages) Microchip Technology – 28/40/44-Pin Flash-Based, 8-Bit CMOS Microcontrollers

PIC16F882/883/884/886/887
TABLE 11-6: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CCP1CON P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 128
CCP2CON
—
—
DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 129
CCPR1L Capture/Compare/PWM Register 1 Low Byte (LSB)
130
CCPR1H Capture/Compare/PWM Register 1 High Byte (MSB)
130
CCPR2L Capture/Compare/PWM Register 2 Low Byte (LSB)
130
CCPR2H Capture/Compare/PWM Register 2 High Byte (MSB)
130
CM2CON1 MC1OUT MC2OUT C1RSEL C2RSEL
—
—
T1GSS C2SYNC 96
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF RBIF
33
PIE1
—
ADIE
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE
34
PIE2
OSFIE C2IE
C1IE
EEIE
BCLIE ULPWUIE — CCP2IE
35
PIR1
—
ADIF
RCIF
TXIF
SSPIF CCP1IF TMR2IF TMR1IF
36
PIR2
OSFIF C2IF
C1IF
EEIF
BCLIF ULPWUIF — CCP2IF
37
T1CON
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON 84
TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
81
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
81
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
55
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the
Capture and Compare.
TABLE 11-7: REGISTERS ASSOCIATED WITH PWM AND TIMER2
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register
on Page
CCP1CON P1M1
P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 128
CCP2CON
—
—
DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 129
ECCPAS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 146
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
33
PR2
Timer2 Period Register
87
PSTRCON
—
—
— STRSYNC STRD STRC STRB STRA
150
PWM1CON PRSEN PDC6 PDC5
PDC4
PDC3 PDC2 PDC1 PDC0
149
T2CON
— TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 88
TMR2
Timer2 Module Register
87
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
50
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
55
TRISD
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0
59
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the
PWM.
 2006-2012 Microchip Technology Inc.
DS41291G-page 153