SST89E516RD2_13 Datasheet, PDF(44/94 Page) Microchip Technology

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SST89E516RD2_13 Datasheet, PDF (44/94 Pages) Microchip Technology – FlashFlex MCU

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FlashFlex MCU

SST89E516RD2 / SST89E516RD

SST89V516RD2 / SST89V516RD

Serial I/O

Data Sheet

Full-Duplex, Enhanced UART

The device serial I/O port is a full-duplex port that allows data to be transmitted and received simulta-

neously in hardware by the transmit and receive registers, respectively, while the software is perform-

ing other tasks. The transmit and receive registers are both located in the Serial Data Buffer (SBUF)

special function register. Writing to the SBUF register loads the transmit register, and reading from the

SBUF register obtains the contents of the receive register.

The UART has four modes of operation which are selected by the Serial Port Mode Specifier (SM0 and

SM1) bits of the Serial Port Control (SCON) special function register. In all four modes, transmission is

initiated by any instruction that uses the SBUF register as a destination register. Reception is initiated

in mode 0 when the Receive Interrupt (RI) flag bit of the Serial Port Control (SCON) SFR is cleared

and the Reception Enable/ Disable (REN) bit of the SCON register is set. Reception is initiated in the

other modes by the incoming start bit if the REN bit of the SCON register is set.

Framing Error Detection

Framing Error Detection is a feature, which allows the receiving controller to check for valid stop bits in

modes 1, 2, or 3. Missing stops bits can be caused by noise in serial lines or from simultaneous trans-

mission by two CPUs.

Framing Error Detection is selected by going to the PCON register and changing SMOD0 = 1 (see Fig-

ure 17). If a stop bit is missing, the Framing Error bit (FE) will be set. Software may examine the FE bit

after each reception to check for data errors. After the FE bit has been set, it can only be cleared by

software. Valid stop bits do not clear FE. When FE is enabled, RI rises on the stop bit, instead of the

last data bit (see Figure 18 and Figure 19).

SM0/FE SM1 SM2 REN TB8 RB8 TI

RI SCON

(98H)

Set FE bit if stop bit is 0 (framing error) (SMOD0 = 1)

SM0 to UART mode control (SMOD0 = 0)

SMOD1 SMOD0 BOF POF GF1 GF0

IDL

PCON

(87H)

To UART framing error control

1273 F13.0

Figure 17:Framing Error Block Diagram

DS25093B

02/13

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