PIC18F2X1X_07 Datasheet, PDF (371/378 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology

PIC18F2X1X/4X1X
Half-Bridge Output Mode
Applications Example ...................................... 142
Operation in Power Managed Modes ...................... 149
Operation with Fail-Safe Clock Monitor ................... 149
Output Configurations .............................................. 140
Output Relationships (Active-High) .......................... 141
Output Relationships (Active-Low) ........................... 141
Programmable Dead-Band Delay ............................ 146
Setup for PWM Operation ........................................ 149
Start-up Considerations ........................................... 148
Q
Q Clock .................................................................... 135, 140
R
RAM. See Data Memory.
RBIF Bit .............................................................................. 98
RC Oscillator ...................................................................... 25
RCIO Oscillator Mode ................................................ 25
RC_IDLE Mode .................................................................. 39
RC_RUN Mode .................................................................. 35
RCALL ............................................................................. 287
RCON Register
Bit Status During Initialization .................................... 48
Reader Response ............................................................ 374
Register File ....................................................................... 63
Registers
ADCON0 (A/D Control 0) ......................................... 211
ADCON1 (A/D Control 1) ......................................... 212
ADCON2 (A/D Control 2) ......................................... 213
BAUDCON (Baud Rate Control) .............................. 194
CCP1CON (Enhanced Capture/Compare/PWM
Control 1) ......................................................... 137
CCPxCON (Standard Capture/Compare/PWM
Control) ............................................................ 129
CMCON (Comparator Control) ................................ 221
CONFIG1H (Configuration 1 High) .......................... 238
CONFIG2H (Configuration 2 High) .......................... 240
CONFIG2L (Configuration 2 Low) ............................ 239
CONFIG3H (Configuration 3 High) .......................... 241
CONFIG4L (Configuration 4 Low) ............................ 241
CONFIG5H (Configuration 5 High) .......................... 242
CONFIG5L (Configuration 5 Low) ............................ 242
CONFIG6H (Configuration 6 High) .......................... 243
CONFIG6L (Configuration 6 Low) ............................ 243
CONFIG7H (Configuration 7 High) .......................... 244
CONFIG7L (Configuration 7 Low) ............................ 244
CVRCON (Comparator Voltage
Reference Control) .......................................... 227
Device ID Register 1 ................................................ 245
Device ID Register 2 ................................................ 245
ECCP1AS (ECCP Auto-Shutdown Control) ............. 147
HLVDCON (HLVD Control) ...................................... 231
INTCON (Interrupt Control) ........................................ 83
INTCON2 (Interrupt Control 2) ................................... 84
INTCON3 (Interrupt Control 3) ................................... 85
IPR1 (Peripheral Interrupt Priority 1) .......................... 90
IPR2 (Peripheral Interrupt Priority 2) .......................... 91
OSCCON (Oscillator Control) .................................... 30
OSCTUNE (Oscillator Tuning) ................................... 27
PIE1 (Peripheral Interrupt Enable 1) .......................... 88
PIE2 (Peripheral Interrupt Enable 2) .......................... 89
PIR1 (Peripheral Interrupt Request (Flag) 1) ............. 86
PIR2 (Peripheral Interrupt Request (Flag) 2) ............. 87
PWM1CON (PWM Configuration) ............................ 146
RCON (Reset Control) ......................................... 42, 92
RCSTA (Receive Status and Control) ..................... 193
SSPCON1 (MSSP Control 1, I²C Mode) ................. 162
SSPCON1 (MSSP Control 1, SPI Mode) ................ 153
SSPCON2 (MSSP Control 2, I²C Mode) ................. 163
SSPSTAT (MSSP Status, I²C Mode) ...................... 161
SSPSTAT (MSSP Status, SPI Mode) ...................... 152
Status ........................................................................ 68
STKPTR (Stack Pointer) ............................................ 55
T0CON (Timer0 Control) ......................................... 113
T1CON (Timer1 Control) ......................................... 117
T2CON (Timer 2 Control) ........................................ 123
T3CON (Timer3 Control) ......................................... 125
TRISE (PORTE/PSP Control) ................................. 108
TXSTA (Transmit Status and Control) ..................... 192
WDTCON (Watchdog Timer Control) ...................... 247
RESET ............................................................................. 287
Reset State of Registers .................................................... 48
Resets ....................................................................... 41, 237
Brown-out Reset (BOR) ........................................... 237
Oscillator Start-up Timer (OST) ............................... 237
Power-on Reset (POR) ............................................ 237
Power-up Timer (PWRT) ......................................... 237
RETFIE ............................................................................ 288
RETLW ............................................................................ 288
RETURN .......................................................................... 289
Return Address Stack ........................................................ 54
Return Stack Pointer (STKPTR) ........................................ 55
Revision History ............................................................... 359
RLCF ............................................................................... 289
RLNCF ............................................................................. 290
RRCF ............................................................................... 290
RRNCF ............................................................................ 291
S
SCK ................................................................................. 151
SDI ................................................................................... 151
SDO ................................................................................. 151
SEC_IDLE Mode ............................................................... 38
SEC_RUN Mode ................................................................ 34
Serial Clock, SCK ............................................................ 151
Serial Data In (SDI) .......................................................... 151
Serial Data Out (SDO) ..................................................... 151
Serial Peripheral Interface. See SPI Mode.
SETF ............................................................................... 291
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 151
SLEEP ............................................................................. 292
Sleep
OSC1 and OSC2 Pin States ...................................... 31
Software Simulator (MPLAB SIM) ................................... 308
Special Event Trigger. See Compare (ECCP Mode).
Special Event Trigger. See Compare (ECCP Module).
Special Features of the CPU ........................................... 237
Special Function Registers ................................................ 64
Map ............................................................................ 64
SPI Mode (MSSP)
Associated Registers ............................................... 159
Bus Mode Compatibility ........................................... 159
Effects of a Reset .................................................... 159
Enabling SPI I/O ...................................................... 155
Master Mode ............................................................ 156
Master/Slave Connection ........................................ 155
Operation ................................................................. 154
Operation in Power Managed Modes ...................... 159
Serial Clock ............................................................. 151
Serial Data In ........................................................... 151
© 2007 Microchip Technology Inc.
Preliminary
DS39636C-page 369