|
PIC18F2X1X_07 Datasheet, PDF (282/378 Pages) Microchip Technology – 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology | |||
|
◁ |
PIC18F2X1X/4X1X
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Inclusive OR Literal with W
IORLW k
0 ⤠k ⤠255
(W) .OR. k â W
N, Z
0000 1001 kkkk kkkk
The contents of W are ORed with the
eight-bit literal âkâ. The result is placed
in W.
1
1
Q2
Read
literal âkâ
Q3
Process
Data
Q4
Write to W
Example:
IORLW
35h
Before Instruction
W
= 9Ah
After Instruction
W
= BFh
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Q1
Decode
Inclusive OR W with f
IORWF f {,d {,a}}
0 ⤠f ⤠255
d â [0,1]
a â [0,1]
(W) .OR. (f) â dest
N, Z
0001 00da ffff ffff
Inclusive OR W with register âfâ. If âdâ is
â0â, the result is placed in W. If âdâ is â1â,
the result is placed back in register âfâ
(default).
If âaâ is â0â, the Access Bank is selected.
If âaâ is â1â, the BSR is used to select the
GPR bank (default).
If âaâ is â0â and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ⤠95 (5Fh). See
Section 23.2.3 âByte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Modeâ for details.
1
1
Q2
Read
register âfâ
Q3
Process
Data
Q4
Write to
destination
Example:
IORWF RESULT, 0, 1
Before Instruction
RESULT = 13h
W
= 91h
After Instruction
RESULT = 13h
W
= 93h
DS39636C-page 280
Preliminary
© 2007 Microchip Technology Inc.
|
▷ |