DSPIC33FJ16GP101_13 Datasheet, PDF (317/386 Pages) Microchip Technology – 16-Bit Digital Signal Controllers up to 32-Kbyte Flash and 2-Kbyte SRAM

dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
FIGURE 26-22:
SCKx
(CKP = 0)
SCKx
(CKP = 1)
SPIx MASTER MODE (FULL-DUPLEX, CKE = 0, CKP = x, SMP = 1) TIMING
CHARACTERISTICS FOR dsPIC33FJ32(GP/MC)10X
SP10
SP21
SP20
SP35
SP20
SP21
SDOx
MSb
SDIx
SP30, SP31
MSb In
SP40 SP41
Note: Refer to Figure 26-1 for load conditions.
Bit 14 - - - - - -1
LSb
Bit 14 - - - -1
SP30, SP31
LSb In
TABLE 26-40: SPIx MASTER MODE (FULL-DUPLEX, CKE = 0, CKP = x, SMP = 1) TIMING
REQUIREMENTS FOR dsPIC33FJ32(GP/MC)10X
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  TA  +125°C for Extended
Param
No.
Symbol
Characteristic⁽¹⁾
Min
Typ⁽²⁾ Max Units
Conditions
SP10 TscP
Maximum SCKx Frequency
—
—
9
MHz -40ºC to +125ºC and
See Note 3
SP20 TscF
SCKx Output Fall Time
—
—
—
ns See Parameter DO32
and Note 4
SP21 TscR
SCKx Output Rise Time
—
—
—
ns See Parameter DO31
and Note 4
SP30 TdoF
SDOx Data Output Fall Time
—
—
—
ns See Parameter DO32
and Note 4
SP31 TdoR
SDOx Data Output Rise Time —
—
—
ns See Parameter DO31
and Note 4
SP35 TscH2doV, SDOx Data Output Valid after —
TscL2doV SCKx Edge
6
20
ns
SP36 TdoV2scH, SDOx Data Output Setup to
30
TdoV2scL First SCKx Edge
—
—
ns
SP40
TdiV2scH, Setup Time of SDIx Data
TdiV2scL Input to SCKx Edge
30
—
—
ns
SP41 TscH2diL, Hold Time of SDIx Data Input 30
TscL2diL to SCKx Edge
—
—
ns
Note 1:
2:
3:
4:
These parameters are characterized, but are not tested in manufacturing.
Data in “Typ” column is at 3.3V, +25°C unless otherwise stated.
The minimum clock period for SCKx is 111 ns. The clock generated in Master mode must not violate this
specification.
Assumes 50 pF load on all SPIx pins.
 2011-2012 Microchip Technology Inc.
DS70652E-page 317