English
Language : 

PIC18F1220 Datasheet, PDF (301/310 Pages) Microchip Technology – 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
Synchronous Master Mode ...................................... 148
Associated Registers, Reception ..................... 151
Associated Registers, Transmit ....................... 149
Reception ......................................................... 150
Transmission .................................................... 148
Synchronous Slave Mode ........................................ 152
Associated Registers, Receive ........................ 153
Associated Registers, Transmit ....................... 152
Reception ......................................................... 153
Transmission .................................................... 152
Evaluation and Programming Tools ................................. 237
F
Fail-Safe Clock Monitor .................................................... 171
Exiting Operation ..................................................... 183
Interrupts in Power Managed Modes ....................... 183
POR or Wake from Sleep ........................................ 184
WDT During Oscillator Failure ................................. 182
Fail-Safe Clock Monitor (FSCM) ...................................... 182
Fast Register Stack ............................................................ 44
Firmware Instructions ....................................................... 191
Flash Program Memory ...................................................... 57
Associated Registers ................................................. 65
Control Registers ....................................................... 58
Erase Sequence ........................................................ 62
Erasing ....................................................................... 62
Operation During Code-Protect ................................. 65
Reading ...................................................................... 61
Table Latch ................................................................ 60
Table Pointer .............................................................. 60
Boundaries Based on Operation ........................ 60
Table Pointer Boundaries .......................................... 60
Table Reads and Table Writes .................................. 57
Write Sequence ......................................................... 63
Writing to .................................................................... 63
Unexpected Termination .................................... 65
Write Verify ........................................................ 65
G
GOTO ............................................................................... 212
H
Hardware Multiplier ............................................................ 71
Introduction ................................................................ 71
Operation ................................................................... 71
Performance Comparison .......................................... 71
I
I/O Ports ............................................................................. 87
ID Locations ............................................................. 171, 188
INCF ................................................................................. 212
INCFSZ ............................................................................ 213
In-Circuit Debugger .......................................................... 188
In-Circuit Serial Programming (ICSP) ...................... 171, 188
Indirect Addressing ............................................................ 54
INDF and FSR Registers ........................................... 53
Operation ................................................................... 53
Indirect Addressing Operation ............................................ 54
Indirect File Operand .......................................................... 47
INFSNZ ............................................................................ 213
Initialization Conditions for All Registers ...................... 36–38
Instruction Cycle ................................................................. 45
Instruction Flow/Pipelining ................................................. 45
PIC18F1220/1320
Instruction Set .................................................................. 191
ADDLW .................................................................... 197
ADDWF .................................................................... 197
ADDWFC ................................................................. 198
ANDLW .................................................................... 198
ANDWF .................................................................... 199
BC ............................................................................ 199
BCF ......................................................................... 200
BN ............................................................................ 200
BNC ......................................................................... 201
BNN ......................................................................... 201
BNOV ...................................................................... 202
BNZ ......................................................................... 202
BOV ......................................................................... 205
BRA ......................................................................... 203
BSF .......................................................................... 203
BTFSC ..................................................................... 204
BTFSS ..................................................................... 204
BTG ......................................................................... 205
BZ ............................................................................ 206
CALL ........................................................................ 206
CLRF ....................................................................... 207
CLRWDT ................................................................. 207
COMF ...................................................................... 208
CPFSEQ .................................................................. 208
CPFSGT .................................................................. 209
CPFSLT ................................................................... 209
DAW ........................................................................ 210
DCFSNZ .................................................................. 211
DECF ....................................................................... 210
DECFSZ .................................................................. 211
General Format ........................................................ 193
GOTO ...................................................................... 212
INCF ........................................................................ 212
INCFSZ .................................................................... 213
INFSNZ .................................................................... 213
IORLW ..................................................................... 214
IORWF ..................................................................... 214
LFSR ....................................................................... 215
MOVF ...................................................................... 215
MOVFF .................................................................... 216
MOVLB .................................................................... 216
MOVLW ................................................................... 217
MOVWF ................................................................... 217
MULLW .................................................................... 218
MULWF .................................................................... 218
NEGF ....................................................................... 219
NOP ......................................................................... 219
POP ......................................................................... 220
PUSH ....................................................................... 220
RCALL ..................................................................... 221
RESET ..................................................................... 221
RETFIE .................................................................... 222
RETLW .................................................................... 222
RETURN .................................................................. 223
RLCF ....................................................................... 223
RLNCF ..................................................................... 224
RRCF ....................................................................... 224
RRNCF .................................................................... 225
SETF ....................................................................... 225
SLEEP ..................................................................... 226
SUBFWB ................................................................. 226
SUBLW .................................................................... 227
 2004 Microchip Technology Inc.
DS39605C-page 299