24AA52_05 Datasheet, PDF (3/28 Pages) Microchip Technology – 2K 2.2V I2C™ Serial EEPROM with Software Write-Protect

24AA52/24LCS52
TABLE 1-2: AC SPECIFICATIONS
AC CHARACTERISTICS
VCC = +1.8V to +5.5V
Industrial (I): TA = -40°C to +85°C
Param.
No.
Symbol
Characteristic
Min
Typ Max Units
Conditions
1
FCLK
Clock frequency
—
—
400 kHz 2.2V ≤ VCC ≤ 5.5V
—
—
100
1.8V ≤ VCC < 2.5V (24AA52)
2
THIGH Clock high time
600
4000
—
—
ns 2.2V ≤ VCC ≤ 5.5V
—
—
1.8V ≤ VCC < 2.5V (24AA52)
3
TLOW Clock low time
1300
4700
—
—
ns 2.2V ≤ VCC ≤ 5.5V
—
—
1.8V ≤ VCC < 2.5V (24AA52)
4
TR
SDA and SCL rise time
—
(Note 1)
—
—
300
ns 2.2V ≤ VCC ≤ 5.5V
— 1000
1.8V ≤ VCC < 2.5V (24AA52)
5
TF
SDA and SCL fall time
—
—
300
ns (Note 1)
—
6
THD:STA Start condition hold time
600
—
—
ns 2.2V ≤ VCC ≤ 5.5V
4000
—
—
1.8V ≤ VCC < 2.5V (24AA52)
7
TSU:STA Start condition setup
time
600
4700
—
—
ns 2.2V ≤ VCC ≤ 5.5V
—
—
1.8V ≤ VCC < 2.5V (24AA52)
8
THD:DAT Data input hold time
0
—
—
ns (Note 2)
—
9
TSU:DAT Data input setup time
100
—
—
ns 2.2V ≤ VCC ≤ 5.5V
250
—
—
1.8V ≤ VCC < 2.5V (24AA52)
10
TSU:STO Stop condition setup
time
600
4000
—
—
ns 2.2V ≤ VCC ≤ 5.5V
—
—
1.8V ≤ VCC < 2.5V (24AA52)
11
TAA
Output valid from clock
—
(Note 2)
—
—
900
ns 2.2V ≤ VCC ≤ 5.5V
— 3500
1.8V ≤ VCC < 2.5V (24AA52)
12
TBUF
Bus free time: Time the
1300
bus must be free before
4700
a new transmission can
start
—
—
ns 2.2V ≤ VCC ≤ 5.5V
—
—
1.8V ≤ VCC < 2.5V (24AA52)
13
TOF
Output fall time from VIH 20 + 0.1 CB —
250
ns 2.2V ≤ VCC ≤ 5.5V
minimum to VIL
—
—
250
1.8V ≤ VCC < 2.5V (24AA52)
maximum
14
TSP
Input filter spike
suppression
(SDA and SCL pins)
—
—
50
ns (Note 1 and Note 3)
15
TWC
Write cycle time
(byte or page)
—
—
5
ms —
16
—
Endurance
1M
—
— cycles 25°C, VCC = 5.0V, Block
mode (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
© 2005 Microchip Technology Inc.
DS21166J-page 3