MCP651_11 Datasheet, PDF (23/56 Pages) Microchip Technology – 50 MHz, 6 mA Op Amps with mCal

4.0 APPLICATIONS
The MCP651/2/4/5/9 family of self-zeroed op amps is
manufactured using Microchip’s state of the art CMOS
process. It is designed for low cost, low power and high
precision applications. Its low supply voltage, low
quiescent current and wide bandwidth makes the
MCP651/2/4/5/9 ideal for battery-powered applica-
tions.
4.1 Calibration and Chip Select
These op amps include circuitry for dynamic calibration
of the offset voltage (V_OS).
4.1.1 mCal CALIBRATION CIRCUITRY
The internal mCal circuitry, when activated, starts a
delay timer (to wait for the op amp to settle to its new
bias point), then calibrates the input offset voltage
(V_OS). The mCal circuitry is triggered at power-up (and
after some power brown out events) by the internal
POR, and by the memory’s Parity Detector. The power
up time, when the mCal circuitry triggers the calibration
sequence, is 200 ms (typical).
4.1.2 CAL/CS PIN
The CAL/CS pin gives the user a means to externally
demand a low power mode of operation, then to
calibrate V_OS. Using the CAL/CS pin makes it possible
to correct V_OS as it drifts over time (1/f noise and aging;
see Figure 2-35) and across temperature.
The CAL/CS pin performs two functions: it places the
op amp(s) in a low power mode when it is held high,
and starts a calibration event (correction of V_OS) after a
rising edge.
While in the low power mode, the quiescent current is
quite small (I_SS = -3 µA, typical). The output is also is in
a High-Z state.
During the calibration event, the quiescent current is
near, but smaller than, the specified quiescent current
(6 mA, typical). The output continues in the High-Z
state, and the inputs are disconnected from the
external circuit, to prevent internal signals from
affecting circuit operation. The op amp inputs are inter-
nally connected to a common mode voltage buffer and
feedback resistors. The offset is corrected (using a
digital state machine, logic and memory), and the
calibration constants are stored in memory.
Once the calibration event is completed, the amplifier is
reconnected to the external circuitry. The turn on time,
when calibration is started with the CAL/CS pin, is 3 ms
(typical).
There is an internal 5 MΩ pull-down resistor tied to the
CAL/CS pin. If the CAL/CS pin is left floating, the ampli-
fier operates normally.
MCP651/2/4/5/9
For the MCP655 dual and the MCP659 quad, there is
an additional constraint on toggling the two CAL/CS
pins close together; see the t_CON specification in
Table 1-3. If the two pins are toggled simultaneously, or
if they are toggled separately with an adequate delay
between them (greater than t_CON), then the CAL/CS
inputs are accepted as valid. If one of the two pins
toggles while the other pin’s claibration routine is in
progress, then an invalid input occurs and the result is
unpredictable.
4.1.3 INTERNAL POR
This part includes an internal Power On Reset (POR)
to protect the internal calibration memory cells. The
POR monitors the power supply voltage (V_DD). When
the POR detects a low V_DD event, it places the part into
the low power mode of operation. When the POR
detects a normal V_DD event, it starts a delay counter,
then triggers an calibration event. The additional delay
gives a total POR turn on time of 200 ms (typical); this
is also the power up time (since the POR is triggered at
power up).
4.1.4 PARITY DETECTOR
A parity error detector monitors the memory contents
for any corruption. In the rare event that a parity error is
detected (e.g., corruption from an alpha particle), a
POR event is automatically triggered. This will cause
the input offset voltage to be re-corrected, and the op
amp will not return to normal operation for a period of
time (the POR turn on time, t_PON).
4.1.5 CALIBRATION INPUT PIN
A V_CAL pin is available in some options (e.g., the single
MCP651) for those applications that need the calibra-
tion to occur at an internally driven common mode
voltage other than V_DD/3.
Figure 4-1 shows the reference circuit that internally
sets the op amp’s common mode reference voltage
(V_{CM_INT}) during calibration (the resistors are discon-
nected from the supplies at other times). The 5 kΩ
resistor provides over-current protection for the buffer.
V_DD
300 kΩ
V_CAL
150 kΩ
5 kΩ
To op amp during
calibration
V_{CM_INT}
BUFFER
V_SS
FIGURE 4-1:
Input Circuitry.
Common-Mode Reference’s
© 2011 Microchip Technology Inc.
DS22146B-page 23