MCP651_11 Datasheet, PDF (1/56 Pages) Microchip Technology – 50 MHz, 6 mA Op Amps with mCal

MCP651/2/4/5/9
50 MHz, 6 mA Op Amps with mCal
Features
• Gain Bandwidth Product: 50 MHz (typical)
• Short Circuit Current: 100 mA (typical)
• Noise: 7.5 nV/√Hz (typical, at 1 MHz)
• Calibrated Input Offset: ±200 µV (maximum)
• Rail-to-Rail Output
• Slew Rate: 30 V/µs (typical)
• Supply Current: 6.0 mA (typical)
• Power Supply: 2.5V to 5.5V
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• Driving A/D Converters
• Power Amplifier Control Loops
• Barcode Scanners
• Optical Detector Amplifier
Design Aids
• SPICE Macro Models
• FilterLab^® Software
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
Description
The Microchip Technology, Inc. MCP651/2/4/5/9 family
of operational amplifiers features low offset. At power
up, these op amps are self-calibrated using mCal.
Some package options also provide a calibration/chip
select pin (CAL/CS) that supports a low power mode of
operation, with offset calibration at the time normal
operation is re-started. These amplifiers are optimized
for high speed, low noise and distortion, single-supply
operation with rail-to-rail output and an input that
includes the negative rail.
This family is offered in single with CAL/CS pin
(MCP651), dual (MCP652), dual with CAL/CS pins
(MCP655), quad (MCP654) and quad with CAL/CS
pins (MCP659). All devices are fully specified from
-40°C to +125°C.
Typical Application Circuit
R₁
V_DD/2
R₃
V_IN
R₂
MCP65X
V_OUT
R_L
Power Driver with High Gain
Package Types
MCP651
SOIC
NC 1
V_IN– 2
V_IN+ 3
V_SS 4
8 CAL/CS
7 V_DD
6 V_OUT
5 V_CAL
MCP652
3×3 DFN *
V_OUTA 1
8 V_DD
V_INA– 2 _EP 7 V_OUTB
V_INA+ 3
9
6 V_INB–
V_SS 4
5 V_INB+
MCP652
SOIC
V_OUTA 1
V_INA– 2
V_INA+ 3
V_SS 4
8 ^VDD
7 V_OUTB
6 V_INB–
5 ^VINB⁺
MCP654
SOIC, TSSOP
V_{OUTA 1}
V_INA- 2
V_INA+ ₃
V_{DD 4}
V_INB+ 5
V_INB- ₆
V_OUTB 7
14 ^VOUTD
13 V_IND-
12 V_IND+
11 ^VSS
10 V_INC+
9 V_INC-
8 V_OUTC
MCP659
4x4 QFN*
16 15 14 13
V_INA- 1
12 VIND+
V_INA+ ₂
V_DD 3
V_INB+ 4
EP
11 V_SS
17
10 VINC+
9 ^VINC^-
567 8
MCP655
3×3 DFN *
V_OUTA 1
V_INA– 2
V_INA+ 3
V_SS 4
CALA/CSA 5
10 V_DD
9 V_OUTB
EP
11 ^{8 V}INB^–
7 V_INB+
6 CALB/CSB
MCP655
MSOP
V_{OUTA 1}
V_INA– 2
V_INA+ ₃
V_{SS 4}
CALA/CSA 5
10 ^VDD
9 V_OUTB
8 V_INB–
7 ^VINB⁺
6 CALB/CSB
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2011 Microchip Technology Inc.
DS22146B-page 1