MIC45404 Datasheet, PDF (20/32 Pages) Microchip Technology – 19V 5A Ultra-Low Profile DC-to-DC Power Module

MIC45404
The programmed V_IN UVLO threshold, V_{IN_RISE}, is
given by:
EQUATION 5-2:
V _{I N _RISE}
=
EN
_R



1
+
RR----_{21-}
– EN_I  R₂
Where:
EN_R = 1.21V
EN_I = 2 µA
R₁ and R₂ = External resistors
To desensitize the V_IN UVLO threshold against varia-
tions of the pull-up current, EN_I, it is recommended to
run the R₁ – R₂ voltage divider at a significantly higher
current level than the EN_I current.
The corresponding V_IN UVLO hysteresis, V_{IN_HYS}, is
calculated as follows:
EQUATION 5-3:
V _{I N _HYS}
=
150
mV



1
+
RR----_{21-}
Similar calculations also apply to the internal LDO
activation threshold.
5.2 Setting the Switching Frequency
The MIC45404 switching frequency can be
programmed using FREQ, as shown in Table 5-1.
TABLE 5-1: SWITCHING FREQUENCY
SETTINGS
FREQ Pin Setting
Frequency
High Z (open)
400 kHz
0 (GND)
565 kHz
1 (V_DDA)
790 kHz
The switching frequency setting is not arbitrary, but it
needs to be adjusted according to the particular output
voltage selection due to peak-to-peak inductor
ripple requirements. This is illustrated in Section 5.5
“Permissible MIC45404 Settings Combinations”.
5.3 Setting the Output Voltage
The MIC45404 output voltage can be programmed by
setting pins, VOSET0 and VOSET1, as shown in
Table 5-2.
TABLE 5-2: OUTPUT VOLTAGE SETTINGS
VOSET1
VOSET0
Output Voltage
0 (GND)
0 (GND)
1 (V_DDA)
1 (V_DDA)
0 (GND)
High Z (open)
1 (V_DDA)
High Z (open)
High Z (open)
0 (GND)
1 (V_DDA)
0 (GND)
1 (V_DDA)
High Z (open)
0 (GND)
High Z (open)
1 (V_DDA)
High Z (open)
3.3V
2.5V (2.49V)
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
0.7V
To achieve accurate output voltage regulation, the
OUTSNS pin (internal feedback divider top terminal)
should be Kelvin-connected as close as possible to the
point of regulation top terminal. Since both the internal
reference and the internal feedback divider’s bottom
terminal refer to A_GND, it is important to minimize
voltage drops between the A_GND and the point of
regulation return terminal.
5.4 Setting the Current Limit
The MIC45404’s valley-mode current limit on the
low-side MOSFET can be programmed by means of
I_LIM as shown in Table 5-3.
TABLE 5-3: CURRENT LIMIT SETTINGS
I_LIM
Valley Current Limit Rated Output
(Typical Value)
Current
0 (GND)
4.6 A
3A
1 (V_DDA)
6.2 A
4A
High Z (open)
6.8 A
5A
Note that the programmed current limit values act as
pulse-by-pulse, current limit thresholds on the valley
inductor current. If the inductor current has not decayed
below the threshold at the time the PWM requires a new
on time, the high-side MOSFET turn-on is either delayed,
until the valley current recovers below the threshold, or
skipped. Each time the high-side MOSFET turn-on is
skipped, a 4-bit up-down counter is incremented. When
the counter reaches the configuration ‘1111’, a hiccup
sequence is invoked in order to reduce power dissipation
under prolonged short-circuit conditions.
The highest current limit setting (6.8A) is intended to
comfortably accommodate a 5A application. Ensure
that the value of the operating junction temperature
does not exceed the maximum rating in high output
power applications.
DS20005478A-page 20
 2015 Microchip Technology Inc.