DSPIC33FJ32GS406 Datasheet, PDF (183/416 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32GS406/606/608/610 and dsPIC33FJ64GS406/606/608/610
REGISTER 8-7: DMACS0: DMA CONTROLLER STATUS REGISTER 0
U-0
—
bit 15
U-0
U-0
U-0
R/C-0
R/C-0
—
—
—
PWCOL3 PWCOL2
R/C-0
PWCOL1
R/C-0
PWCOL0
bit 8
U-0
—
bit 7
U-0
U-0
U-0
R/C-0
R/C-0
R/C-0
R/C-0
—
—
—
XWCOL3 XWCOL2 XWCOL1 XWCOL0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-12
bit 11
bit 10
bit 9
bit 8
bit 7-4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
PWCOL3: Channel 3 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL2: Channel 2 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL1: Channel 1 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
PWCOL0: Channel 0 Peripheral Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
Unimplemented: Read as ‘0’
XWCOL3: Channel 3 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
XWCOL2: Channel 2 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
XWCOL1: Channel 1 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
XWCOL0: Channel 0 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
 2009 Microchip Technology Inc.
Preliminary
DS70591B-page 183