RFHCS362G_11 Datasheet, PDF (15/54 Pages) Microchip Technology – KEELOQ® Code Hopping Encoder with UHF ASK/FSK Transmitter

3.1.4.2 Button Queue Information (QUEUE)
The queue bits indicate a button combination was
pressed again within 2 s after releasing the previous
activation. Queuing or repeated pressing of the same
buttons (or button combination) is detected by the
rfHCS362 button debouncing circuitry.
The Queue bits are added as the last two bits of the
standard code word. The queue bits are a 2-bit counter
that does not wrap. The counter value starts at ‘00b’
and is incremented if a button is pushed within 2 s of
the previous button press. The current code word is ter-
minated when the buttons are queued. This allows
additional functionality for repeated button presses.
The button inputs are sampled every 6.4 ms during this
2 s period.
00 - first activation
FIGURE 3-5: TIME BITS OPERATION
rfHCS362G/362F
01 - second activation
10 - third activation
11 - from fourth activation on
3.1.4.3 Time BITS
The time bits (Figure 3-5) indicate the duration that the
inputs were activated:
00 - immediate
01 - after 0.8 s
10 - after 1.6 s
11 - after 2.4 s
The TIME bits are incremented every 0.8 s and will not
wrap once it reaches ‘11’.
Time information is alternative to the CRC bits availabil-
ity and is selected by the CTSEL configuration bit.
S[3210]
DATA
Time bits = 00
Time bits set internally to 01 Time bits set internally to 10
Time
TTD
0s
= One Code Word
Time bits actually output
Time bits actually output
0.8 s
1.6 s
2.4 s
3.1.4.4 Cyclic Redundancy Check (CRC)
The CRC bits are calculated on the 65 previously trans-
mitted bits. The decoder can use the CRC bits to check
the data integrity before processing starts. The CRC
can detect all single bit errors and 66% of double bit
errors. The CRC is computed as follows:
EQUATION 3-1: CRC Calculation
CRC[1]_{n + 1} = CRC[0]_n ⊕ Di_n
and
CRC[0]_{n + 1} = (CRC[0]_n ⊕ Di_n) ⊕ CRC[1]_n
with
CRC[1, 0]₀ = 0
and Di_n the nth transmission bit 0 ≤n ≤64
Warning: The CRC may be wrong when the battery
voltage is near the selected VLOW trip point.
This may happen because VLOW is sam-
pled twice each transmission, once for the
CRC calculation and once when VLOW is
transmitted. VDD tends to move slightly dur-
ing a transmission which could lead to a dif-
ferent value for VLOW being used for the
CRC calculation and the transmission.
Work around: If the CRC is incorrect,
recalculate for the opposite value of VLOW.
© 2011 Microchip Technology Inc.
DS41189B-page 15