DSPIC30F4013-20I Datasheet, PDF (13/220 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC30F3014/4013
Table 1-1 provides a brief description of device I/O
pinouts and the functions that may be multiplexed to a
port pin. Multiple functions may exist on one port pin.
When multiplexing occurs, the peripheral module’s
functional requirements may force an override of the
data direction of the port pin.
TABLE 1-1: PINOUT I/O DESCRIPTIONS
Pin Name
Pin
Type
Buffer
Type
Description
AN0-AN12
I
Analog
Analog input channels. AN6 and AN7 are also used for device
programming data and clock inputs, respectively.
AVDD
P
P
Positive supply for analog module.
AVSS
P
P
Ground reference for analog module.
CLKI
CLKO
I
ST/CMOS External clock source input. Always associated with OSC1 pin
function.
O
—
Oscillator crystal output. Connects to crystal or resonator in
Crystal Oscillator mode. Optionally functions as CLKO in RC
and EC modes. Always associated with OSC2 pin function.
CN0-CN7, CN17-CN18
I
ST
Input change notification inputs. Can be software programmed
for internal weak pull-ups on all inputs.
COFS
CSCK
CSDI
CSDO
I/O
ST
Data Converter Interface Frame Synchronization pin.
I/O
ST
Data Converter Interface Serial Clock input/output pin.
I
ST
Data Converter Interface Serial data input pin.
O
—
Data Converter Interface Serial data output pin.
C1RX
C1TX
I
ST
CAN1 bus receive pin.
O
—
CAN1 bus transmit pin.
EMUD
EMUC
EMUD1
EMUC1
EMUD2
EMUC2
EMUD3
EMUC3
I/O
ST
ICD Primary Communication Channel data input/output pin.
I/O
ST
ICD Primary Communication Channel clock input/output pin.
I/O
ST
ICD Secondary Communication Channel data input/output pin.
I/O
ST
ICD Secondary Communication Channel clock input/output pin.
I/O
ST
ICD Tertiary Communication Channel data input/output pin.
I/O
ST
ICD Tertiary Communication Channel clock input/output pin.
I/O
ST
ICD Quaternary Communication Channel data input/output pin.
I/O
ST
ICD Quaternary Communication Channel clock input/output pin.
IC1, IC2, IC7, IC8
I
ST
Capture inputs 1,2, 7 and 8.
INT0
INT1
INT2
I
ST
External interrupt 0.
I
ST
External interrupt 1.
I
ST
External interrupt 2.
LVDIN
I
Analog
Low-Voltage Detect Reference Voltage Input pin.
MCLR
I/P
ST
Master Clear (Reset) input or programming voltage input. This
pin is an active-low Reset to the device.
OCFA
OC1-OC4
I
ST
Compare Fault A input (for Compare channels 1, 2, 3 and 4).
O
—
Compare outputs 1 through 4.
OSC1
OSC2
I
ST/CMOS Oscillator crystal input. ST buffer when configured in RC mode;
CMOS otherwise.
I/O
—
Oscillator crystal output. Connects to crystal or resonator in
Crystal Oscillator mode. Optionally functions as CLKO in RC
and EC modes.
PGD
PGC
I/O
ST
In-Circuit Serial Programming™ data input/output pin.
I
ST
In-Circuit Serial Programming clock input pin.
Legend: CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
I
= Input
Analog = Analog input
O
= Output
P
= Power
© 2007 Microchip Technology Inc.
DS70138E-page 11