MIC4600 Datasheet, PDF (12/26 Pages) Microchip Technology – 28V Half-Bridge MOSFET Driver

MIC4600
5.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 5-1.
TABLE 5-1: PIN FUNCTION TABLE
Pin Number Pin Name
Pin Function
1
2
3
4
5
6
7
8, 16
9
10
11
12
13
14
15
EPAD
V_IN
EN
HSI
LSI
NC
FAULT
DELAY
AGND
PGND
DL
SW
DH
BST
VDD
AVDD
EPAD
VIN Supply (Input): Input supply to the internal LDO.The VIN operating voltage
range is from 4.5V to 28V. Connect a decoupling capacitor between this pin and
PGND.
Enable (Input): A logic level high allows normal operation. A logic level low on this
pin shuts down the drive in a low quiescent current state. The EN pin must not be
left floating.
High side input (input): A logic level input that controls the high side gate drive.
Low side input (input): A logic level input that controls the low side gate drive.
No Connect. Not internally connected.
FAULT (Output). The active low, open drain output pulls low during an
over-temperature fault. A resistor to VDD is needed to pull this signal high.
Delay (Output). Connect a resistor from this pin to ground to adjust the dead time
(break before make).
Analog ground. AGND must be connected directly to the ground planes. Do not
route the AGND pin to the PGND Pad on the top layer. Refer to the PCB layout
guidelines for details.
Power Ground. PGND is the ground path for the MIC4600 output drivers. The
PGND pin should be connected to the source of low-side N-Channel MOSFET and
the negative terminals of decoupling capacitors.
Drive Low (Output). Low side MOSFET gate driver.
Switch Node (Output): Internal connection for the high-side MOSFET source and
low-side MOSFET drain. Due to the high speed switching on this pin, the SW pin
should be routed away from sensitive nodes.
Drive High (Output). High side MOSFET gate driver.
Boost (output): Bootstrapped voltage to the high-side N-channel MOSFET driver.
Connect a Schottky diode between the VDD pin and the BST pin. Connect a boost
capacitor between the BST pin and the SW pin.
5V Internal Linear Regulator (Output): VDD supplies the power MOSFET gate drive
supply voltage. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD
should be tied to VIN pin. A 2.2 μF ceramic capacitor from the VDD pin to ground
plane on PCB is required for stability.
5V Analog Input (Input): AVDD is the supply for the internal driver logic and control
circuitry. Connect the VDD output to the AVDD pin.
Exposed thermal pad. Connect to the ground plane for optimum thermal
performance.
DS20005584A-page 12
 2016 Microchip Technology Inc.