PIC16F716-I Datasheet, PDF (107/136 Pages) Microchip Technology – 8-bit Flash-based Microcontroller with A/D Converter and Enhanced Capture/Compare/PWM

PIC16F716
FIGURE 12-10: A/D CONVERSION TIMING
BSF ADCON0, GO
134
Q4
A/D CLK ¹³²
A/D DATA
ADRES
ADIF
GO
SAMPLE
(TOSC/2)⁽¹⁾
1 Tcy
131
130
7
6
5
4
3
2
1
0
OLD_DATA
NEW_DATA
SAMPLING STOPPED
DONE
Note 1: If the A/D clock source is selected as RC, a time of TCY is added before the A/D clock starts. This allows the SLEEP instruction
to be executed.
TABLE 12-8: A/D CONVERSION REQUIREMENTS
Param
No.
Sym
Characteristic
Min
130
TAD A/D clock period
Industrial
1.6
Industrial
1.6
Extended
1.6
Extended
1.6
131
TCNV Conversion time (not including S/H time)⁽¹⁾ 9.5
132 TACQ Acquisition time
(Note 2)
Typ†
—
4.0
—
6.0
—
20
Max Units
Conditions
—
μs TOSC based, VREF ≥ 3.0V
6.0 μs A/D RC mode
—
μs TOSC based, VREF ≥ 3.0V
9.0 μs A/D RC mode
9.5 TAD
—
μs
5*
—
—
μs The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the last
sampled voltage (as stated on
CHOLD).
134
TGO Q4 to A/D clock start
— TOSC/2 ** —
— If the A/D clock source is selected
as RC, a time of TCY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
135 TSWC Switching from convert → sample time
1.5 **
—
—
TAD
* These parameters are characterized but not tested.
** This specification ensured by design.
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: ADRES register may be read on the following TCY cycle.
2: See Section 12.1 “DC Characteristics: PIC16F716 (Industrial, Extended)” for min. conditions.
© 2007 Microchip Technology Inc.
DS41206B-page 105