SST39VF6401B Datasheet, PDF (1/36 Pages) Silicon Storage Technology, Inc – 64 Mbit (x16) Multi-Purpose Flash Plus

Not recommended for new designs.
Please use SST38VF6401B/6402B/6403B/64040B
64 Mbit (x16) Multi-Purpose Flash Plus
SST39VF6401B / SST39VF6402B
Not Recommended for New Designs
The SST39VF6401B / SST39VF6402B devices are 4M x16, CMOS Multi-Purpose
Flash Plus (MPF+) manufactured with proprietary, high performance CMOS
SuperFlash technology. The split-gate cell design and thick-oxide tunneling injec-
tor attain better reliability and manufacturability compared with alternate
approaches. The SST39VF6401B / SST39VF6402B write (Program or Erase)
with a 2.7-3.6V power supply. These devices conform to JEDEC standard pinouts
for x16 memories and are command set compatible with other Flash devices,
enabling customers to save time and resources in implementation.
Features
• Organized as 4M x16
• Single Voltage Read and Write Operations
– 2.7-3.6V
• Superior Reliability
– Endurance: 100,000 Cycles (Typical)
– Greater than 100 years Data Retention
• Low Power Consumption (typical values at 5 MHz)
– Active Current: 9 mA (typical)
– Standby Current: 3 µA (typical)
– Auto Low Power Mode: 3 µA (typical)
• Hardware Block-Protection/WP# Input Pin
– Top Block-Protection (top 32 KWord)
for SST39VF6402B
– Bottom Block-Protection (bottom 32 KWord)
for SST39VF6401B
• Sector-Erase Capability
– Uniform 2 KWord sectors
• Block-Erase Capability
– Uniform 32 KWord blocks
• Chip-Erase Capability
• Erase-Suspend/Erase-Resume Capabilities
• Hardware Reset Pin (RST#)
• Security-ID Feature
– Microchip: 128 bits; User: 128 bits
• Fast Read Access Time:
– 70 ns
• Latched Address and Data
• Fast Erase and Word-Program:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 40 ms (typical)
– Word-Program Time: 7 µs (typical)
• Automatic Write Timing
– Internal V_PP Generation
• End-of-Write Detection
– Toggle Bits
– Data# Polling
• CMOS I/O Compatibility
• JEDEC Standard
– Flash EEPROM Pin Assignments
– Software command sequence compatibility
- Address format is 11 bits, A₁₀-A₀
- Block-Erase 6th Bus Write Cycle is 30H
- Sector-Erase 6th Bus Write Cycle is 50H
• Packages Available
– 48-lead TSOP (12mm x 20mm)
– 48-ball TFBGA (8mm x 10mm)
• All devices are RoHS compliant
© 2015
www.microchip.com
DS20005008B
08/15