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MIC5163_09 Datasheet, PDF (9/15 Pages) Micrel Semiconductor – Dual Regulator Controller for DDR3 GDDR3/4/5 Memory Termination
Micrel, Inc.
Functional Description
The MIC5163 is a high performance linear controller,
utilizing scalable N-Channel MOSFETs to provide
JEDEC compliant bus termination. Termination is
achieved by dividing down the VDDQ voltage by a half,
providing the reference (VREF) voltage. The MIC5163
controls two external N-Channel MOSFETs to form two
separate regulators. It operates by switching between
either the high-side MOSFET or the low-side MOSFET,
depending on whether the current is being sourced to
the load or being sinked by the regulator.
VDDQ
The VDDQ pin on the MIC5163 provides the source
current through the high side N-Channel and the
reference voltage to the device. The MIC5163 can
operate at VDDQ input voltages as low as 0.75V. A
bypass capacitance will increase performance by
improving the source impedance at higher frequencies.
VTT
VTT is the actual termination point. VTT is regulated to
VREF. Due to high speed signaling, the load current seen
by VTT is constantly changing. To maintain adequate
large signal transient response, Oscons and ceramics
are recommended on VTT. The Oscon capacitors provide
bulk charge storage while the smaller ceramic capacitors
provide current during the fast edges of the bus
transition.
MIC5163
VREF
Two resistors dividing down the VDDQ voltage provide
VREF. The resistors are valued at around 17kΩ. A
minimum capacitor value of 120pF from VREF to ground
is mandatory.
VCC
VCC supplies the internal circuitry of the MIC5163 and
provides the drive voltage to enhance the external N-
Channel MOSFETs. A small 1μF capacitor is
recommended for bypassing the VCC pin.
Feedback and Compensation
The feedback provides the path for the error amplifier to
regulate the VTT. An external resistor must be placed
between the feedback and VTT. Feedback resistor values
should not exceed 10kΩ and compensation capacitors
should not be less than 40pF.
Enable
The MIC5163 features an active high enable input. In the
off mode state, leakage currents are reduced to
microamperes. The enable input has thresholds
compatible with TTL/CMOS for simple logic interfacing.
The enable pin can be tied directly to VDDQ or VCC for
functionality.
April 2009
9
M9999-042209-A