KSZ8862-16_10 Datasheet, PDF (84/125 Pages) Micrel Semiconductor – 2-Port Ethernet Switch with Non-PCI Interface and Fiber Support

Micrel, Inc.
KSZ8862-16/32MQL
Bank 46 PHY 2 MII-Register Basic Control Register (0x00): P2MBCR
This register contains Media Independent Interface (MII) control for the switch function as defined in the IEEE 802.3
specification.
Bit
Default R/W Description
Bit is same as:
15
0
RO Soft reset
Not supported.
14
0
RW Far-End Loopback
1 = perform loop back, as indicated (see Figure14):
Start: RXP1/RXM1 (port 1)
Loop back: PMD/PMA of port 2’s PHY
End: TXP1/TXM1 (port 1)
0 = normal operation.
Bank 51 0x02 bit 8
13
0
RW Force 100
1 = 100 Mbps.
0 = 10 Mbps.
Bank 51 0x02 bit 6
12
1
RW AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Bank 51 0x02 bit 7
11
0
RW Power Down
1 = power down.
0 = normal operation.
Bank 51 0x02 bit 11
10
0
RO Isolate
Not supported.
9
0
RW Restart AN
1 = restart auto-negotiation.
0 = normal operation,
Bank 51 0x02 bit 13
8
0
RW Force Full Duplex
1 = full duplex.
0 = half duplex.
Bank 51 0x02 bit 5
7
0
RO Collision test
Not supported.
6
0
RO Reserved
5
1
R/W HP_mdix
1 = HP Auto MDI-X mode.
0 = Micrel Auto MDI-X mode.
Bank 51 0x04 bit 15
4
0
RW Force MDI-X
1 = force MDI-X.
0 = normal operation.
Bank 51 0x02 bit 9
3
0
RW Disable MDI-X
1 = disable auto MDI-X.
0 = normal operation.
Bank 51 0x02 bit 10
2
0
RW Reserved
Bank 51 0x02 bit 12
1
0
RW Disable Transmit
1 = disable transmit.
0 = normal operation.
Bank 51 0x02 bit 14
0
0
RW Disable LED
1 = disable LED.
0 = normal operation.
Bank 51 0x02 bit 15
August 2010
84
M9999-081310-3.1