KSZ8862-16_10 Datasheet, PDF (59/125 Pages) Micrel Semiconductor – 2-Port Ethernet Switch with Non-PCI Interface and Fiber Support

Micrel, Inc.
KSZ8862-16/32MQL
MARH[15:0] = 0x0123
The following table shows the register bit fields:
Bit
Default Value R/W
Description
15-0
-
RW
MARL MAC Address Low
The least significant word of the MAC address.
Bank 2 Host MAC Address Register Middle (0x02): MARM
The middle word of Host MAC address.
The following table shows the register bit fields:
Bit
Default Value R/W
Description
15-0
-
RW
MARM MAC Address Middle
The middle word of the MAC address.
Bank 2 Host MAC Address Register High (0x04): MARH
The high word of Host MAC address.
The following table shows the register bit fields.
Bit
Default Value R/W
Description
15-0
-
RW
MARH MAC Address High
The Most significant word of the MAC address.
Bank 3 On-Chip Bus Control Register (0x00): OBCR
This register controls the on-chip bus speed for the KSZ8862M. It is used for power management when the external host
CPU is running at a slow frequency. The default of the on-chip bus speed is 125 MHz without EEPROM. When the
external host CPU is running at a higher clock rate, the on-chip bus should be adjusted for the best performance.
Bit
Default Value R/W
Description
15-2
-
RO
Reserved
1-0
0x0
RW
OBSC On-Chip Bus Speed Control
00: 125MHz.
01: 62.5MHz.
10: 41.66MHz.
11: 25MHz.
Note: When external EEPROM is enabled, the bit 1 in Configparm word (0x6H) is used to
contol this speed as below:
Bit 1 = 0 , this value will be 00 for 125 MHz.
Bit 1 = 1 , this value will be 11 for 25 MHz.
(User still can write these two bits to change speed after EEPROM data loaded)
August 2010
59
M9999-081310-3.1