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PL138-28 Datasheet, PDF (8/11 Pages) Micrel Semiconductor – 2.5V-3.3V Low-Skew 1-2 Differential PECL Fanout Buffer
PL138-28
2.5V-3.3V Low-Skew 1-2 Differential PECL Fanout Buffer
CLK-IN Input Driven by a CMOS Driver:
+2.5V or +3.3V
PL138
CMOS
1K
1K
CLK-INx
0.1µF
CLK-IN Input Driven by Single Ended LVPECL:
+3.3V
+3.3V
130
PL138
LVPECL
50 Ω Line
1K
0.1µF
82
CLK-INx
CLK-IN Input Driven by an HCSL Driver:
+2.5V or +3.3V
50 Ω Line
+2.5V or +3.3V
1K 1K
PL138
HCSL
50 Ω Line
50 50
1K 1K
CLK-INx
HCSL presents its signals very close to the ground
rail, below the VCMR range, so the HCSL signals can
not be connected to the PL138 input directly. AC
coupling is required for HCSL signals on the PL138
input.
TERMINATION FOR LVPECL OUTPUTS
The required termination for LVPECL is 50Ω to a VCC-2V DC voltage level. Below are two schematics to
implement this termination.
LVPECL Termination Schematic #1:
VCC
VCC
LVPECL Termination Schematic #2:
VCC
PL138
Qx Buffer
R1 R1
50 Ω Line
50 Ω Line
R2 R2
Target
LVPECL
Input
PL138
Qx Buffer
50 Ω Line
50 Ω Line
50 50
Target
LVPECL
Input
RT
VCC=3.3V, Ideal values: R1=127Ω , R2=82.5Ω
Commercial values (E24): R1=130Ω , R2=82Ω
VCC=2.5V, Ideal values: R1=250Ω , R2=62.5Ω
Commercial values (E24): R1=240Ω , R2=62Ω
Schematic #2 is an alternative simplified termination.
VCC=3.3V, Ideal value: RT=48.7Ω
Commercial value: RT=50Ω (E24: 51Ω)
VCC=2.5V, Ideal value: RT=18.7Ω
Commercial value: RT=18Ω
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944-0800 • fax +1(408) 474-1000 • www.micrel.com Rev 11/26/13 Page 8