PL138-28 Datasheet, PDF (7/11 Pages) Micrel Semiconductor – 2.5V-3.3V Low-Skew 1-2 Differential PECL Fanout Buffer

PL138-28
2.5V-3.3V Low-Skew 1-2 Differential PECL Fanout Buffer
APPLICATION INFORMATION
The following circuits show different configurations for different input logic type signals. For
good signal integrity at the PL138 input, the signals need to be properly terminated according
to the logic type requirements. The signals need to be presented at the PL138 input according
to V_CMR, V_PP and other input requirements.
CLK-IN Input Driven by a 3.3V LVPECL Driver:
+3.3V
+3.3V
+3.3V
130 130
PL138
50 Ω Line
3.3V LVPECL Driver, Alternative Termination:
+3.3V
+3.3V
PL138
50 Ω Line
LVPECL
CLK-INx
LVPECL
CLK-INx
50 Ω Line
82 82
50 Ω Line
50 50
50
CLK-IN Input Driven by a CML Driver:
+3.3V
+3.3V
50 50
50 Ω Line
CML
50 Ω Line
+3.3V
PL138
CLK-INx
CLK-IN Input Driven by an SSTL Driver:
+2.5V
+2.5V
+3.3V
120 120
50 Ω Line
PL138
SSTL
CLK-INx
50 Ω Line
120 120
CLK-IN Input Driven by an LVDS Driver:
+2.5V or +3.3V
+2.5V or +3.3V
PL138
50 Ω Line
LVDS
100
CLK-INx
50 Ω Line
LVDS Driver, Alternative AC Coupling:
+2.5V or +3.3V
50 Ω Line
+2.5V or +3.3V
1K _1K
PL138
LVDS
100
CLK-INx
50 Ω Line
1K 1K
This circuit is for compatibility only. AC coupling is not really
required for LVDS. The VCMR range of the PL138 reaches
low enough that LVDS signals can be connected directly to
the PL138 input like in the circuit to the left.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel [phone] • fax [phone] • www.micrel.com Rev 11/26/13 Page 7