MIC74_14 Datasheet, PDF (8/20 Pages) Micrel Semiconductor – 2-Wire Serial I/O Expander and Fan Controller

Micrel, Inc.
Functional Diagram
MIC74
Typical I/O Port (Fan Speed Control Logic Not Shown)
Functional Description
Pin Descriptions
VDD
Power supply input connection. See Operating Ratings
section for additional information.
GND
Ground or return connection for all MIC74 functions.
CLK
A CLK signal is provided by the host (master) and is
common to all devices on the bus. The CLK signal
controls all transactions in both directions on the bus and
is applied to each MIC74 at the CLK pin.
DATA
Serial data is bidirectional and is common to all devices
on the bus. The MIC74’s DATA output is open-drain.
The DATA line requires one external pull-up resistor or
current source per system that can be located anywhere
along the line.
A2, A1, A0
The MIC74 responds to its own unique address which is
assigned using the A0–A2 pins. A0–A2 set the three
LSBs (least significant bits) of the MIC74’s 7-bit slave
address. The three address pins allow eight unique
MIC74 addresses in a system. When the MIC74’s
address matches an address received in the serial bit
stream, communication is initiated.
A2, A1 and A0 should be connected to GND or VDD. The
state of these pins is sampled only once at device power-
on. New slave addresses are not accepted unless the
MIC74 is powered off then on.
Table 8. MIC74 Address Configuration
Inputs
MIC74 Slave Address
A2
A1
A0
Binary
Hex
0
0
0
010 0000b
20h
0
0
1
010 0001b
21h
0
1
0
010 0010b
22h
0
1
1
010 0011b
23h
1
0
0
010 0100b
24h
1
0
1
010 0101b
25h
1
1
0
010 0110b
26h
1
1
1
010 0111b
27h
September 30, 2014
8
Revision 3.0