MIC4605 Datasheet, PDF (7/25 Pages) Micrel Semiconductor – 85V Half-Bridge MOSFET Drivers

Micrel, Inc.
MIC4605
Timing Diagrams
In LI/HI input mode, external LI/HI inputs are delayed to
the point that HS is low before LI is pulled high and
similarly LO is low before HI goes high
HO goes high with a high signal on HI after a typical delay
of 35ns (t_HPLH). HI going low drives HO low also with
typical delay of 35ns (t_HPHL).
Likewise, LI going high forces LO high after typical delay of
35ns (t_LPLH) and LO follows low transition of LI after typical
delay of 35ns (t_LPHL).
HO and LO output rise and fall times (t_R/t_F) are typically
20ns driving 1000pF capacitive loads.
Note: All propagation delays are measured from the 50%
voltage level.
Figure 1. Separate Non-Overlapping LI/HI Input Mode (MIC4605-1)
November 11, 2013
7
Revision 1.0