KSZ8091MNX Datasheet, PDF (65/83 Pages) Micrel Semiconductor – 10Base-T/100Base-TX Physical Layer Transceiver

Micrel, Inc.
KSZ8091MNX/KSZ8091RNB
Address
Name
Description
Mode⁽¹¹⁾
Default
MMD Address 1Fh, Register 6h – Wake-On-LAN – Customized Packet, Type 0, Expected CRC 1
MMD Address 1Fh, Register Ch – Wake-On-LAN – Customized Packet, Type 1, Expected CRC 1
MMD Address 1Fh, Register 12h – Wake-On-LAN – Customized Packet, Type 2, Expected CRC 1
MMD Address 1Fh, Register 18h – Wake-On-LAN – Customized Packet, Type 3, Expected CRC 1
1F.6.15:0
1F.C.15:0
1F.12.15:0
1F.18.15:0
Custom Packet This register stores the upper two bytes for the RW
Type X
expected CRC.
CRC 1
Bit [15:8]= Byte 4 (CRC [31:24])
Bit [7:0] = Byte 3 (CRC [23:16])
The lower two bytes for the expected CRC are
stored in the previous register.
0000_0000_0000_0000
MMD Address 1Fh, Register 19h – Wake-On-LAN – Magic Packet, MAC-DA-0
1F.19.15:0
Magic Packet This register stores the lower two bytes of the RW
MAC-DA-0
destination MAC address for the magic packet.
0000_0000_0000_0000
Bit [15:8]= Byte 2 (MAC Address [15:8])
Bit [7:0] = Byte 1 (MAC Address [7:0])
The upper four bytes of the destination MAC
address are stored in the following two
registers.
MMD Address 1Fh, Register 1Ah – Wake-On-LAN – Magic Packet, MAC-DA-1
1F.1A.15:0
Magic Packet
MAC-DA-1
This register stores the middle two bytes of the RW
destination MAC address for the magic packet.
0000_0000_0000_0000
Bit [15:8]= Byte 4 (MAC Address [31:24])
Bit [7:0] = Byte 3 (MAC Address [23:16])
The lower two bytes and upper two bytes of the
destination MAC address are stored in the
previous and following registers, respectively.
MMD Address 1Fh, Register 1Bh – Wake-On-LAN – Magic Packet, MAC-DA-2
1F.1B.15:0
Magic Packet
MAC-DA-2
This register stores the upper two bytes of the RW
destination MAC address for the magic packet.
0000_0000_0000_0000
Bit [15:8]= Byte 6 (MAC Address [47:40])
Bit [7:0] = Byte 5 (MAC Address [39:32])
The lower four bytes of the destination MAC
address are stored in the previous two
registers.
Note:
11. RW = Read/Write.
RO = Read only.
LH = Latch high.
August 31, 2015
65
Revision 1.2