PL902XXX Datasheet, PDF (6/10 Pages) Micrel Semiconductor – Lowest power and smallest programmable jitter attenuator

Micrel, Inc.
PL902xxx
Layout Recommendations
The following guidelines are designed to assist the user to create a performance-optimized PCB design.
Signal Integrity and Termination Considerations
 Keep traces short for good signal integrity.
 Trace = Inductor. With a capacitive load this causes
ringing.
 Long trace = Transmission line. Without proper
termination, this will cause reflections that also look
like ringing.
 Design long traces (greater than 1 inch) as “striplines”
or “microstrips” with defined impedance.
 Match the trace at one side to avoid reflections
bouncing back and forth.
Decoupling and Power Supply Considerations
 Place decoupling capacitors as close as possible to
the VDD pin(s) to limit noise from the power supply.
 Multiple VDD pins should be decoupled separately for
best performance.
 The addition of a ferrite bead in series with VDD can
help prevent noise from other board sources.
 The value of the decoupling capacitor is frequency-
dependent. Typical values to use are 0.1µF for
designs using frequencies <50MHz and 0.01µF for
designs using frequencies >50MHz.
August 1, 2014
6
Revision 1.1
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