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PL123-05NSC Datasheet, PDF (5/8 Pages) Micrel Semiconductor – Low Skew Fanout Buffer
PL123-05N/-09N
Low Skew Fanout Buffer
NOISE CHARACTERISTICS (Commercial and Industrial Temperature Devices)
Parameter Description
Test Conditions
Min. Typ. Max. Unit
Additive Phase Jitter
V DD=3.3V, Frequency=100MHz
Offset=12KHz ~ 20MHz
60
fs
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
10
PL123-09N Additive Phase Jitter:
VDD=3.3V, CLK=100MHz, Integration Range 12KHz to 20MHz: 0.059ps typical.
REF Input PL123-09N Output
100
1000
10000
100000
1000000
10000000
100000000
Offset Frequency (Hz)
When a buffer is used to pass a signal then the buffer will add a little bit of its own noise. The phase noise on the output of the
buffer will be a little bit more than the phase noise in the input signal. To quantify the noise addition in the buffer we compare the
Phase Jitter numbers from the input and the output. The difference is called "Additive Phase Jitter". The formula for the Additive
Phase Jitter is as follows:
2
2
Additive Phase Jitter = (Output Phase Jitter) - (Input Phase Jitter)
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 03/15/12 Page 5