PL500-17 Datasheet, PDF (4/6 Pages) Micrel Semiconductor – Low Phase Noise VCXO (17MHz to 36MHz)

PL500-17
Low Phase Noise VCXO (17MHz to 36MHz)
3. AC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN. TYP. MAX. UNITS
Input Crystal Frequency
Output Clock Rise/Fall Time
Output Clock Duty Cycle
Output Enable/Disable Time
Start-Up Time
F_in Fundamental Mode
t_{r /} t_f 0.8V to 2.0V, 10 pF load
t_{r /} t_f 0.3V to 3.0V, 15 pF load
t_OE
t_SU
17
36 MHz
1.15
ns
3.7
45
50
55
%
5
ns
1
ms
4. Jitter and Phase Noise Specifications
PARAMETERS
CONDITIONS
RMS Period Jitter
(1 sigma – 1000 samples)
With capacitive decoupling between
V_DD and GND.
27MHz @100Hz offset
Phase Noise,
Relative to Carrier
27MHz @1kHz offset
27MHz @10kHz offset
27MHz @100kHz offset
27MHz @1MHz offset
MIN. TYP. MAX. UNITS
2.5
ps
-100
dBc/Hz
-125
dBc/Hz
-142
dBc/Hz
-150
dBc/Hz
-150
dBc/Hz
5. DC Specifications
PARAMETERS
Supply Current,
Dynamic
Supply Current,
Output Disabled
Operating Voltage
Output Low Voltage,CMOS
Output High Voltage, CMOS
Output Drive Current
VCXO Control Voltage
SYMBOL
CONDITIONS
I_DD
I_{D D_ O E}
V_DD
V_OLC
V_OHC
VCON
27MHz, 15pF Load, 3.3V
27MHz, 15pF Load, 2.5V
27MHz, 3.3V, OE=Low
27MHz, 2.5V, OE=Low
I_OL = +4mA
I_OH = -4mA
For V_OL<0.4V or V_OH>2.4V
MIN. TYP.
3.7
2.4
1.4
1
2.25
V_DD – 0.4
8
9.5
0
MAX.
5
3.5
UNITS
mA
mA
3.63
V
0.4
V
V
mA
V_DD
V
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel [phone] • fax [phone] • www.micrel.com Rev 6/15/10 Page 4