MIC280_06 Datasheet, PDF (4/23 Pages) Micrel Semiconductor – Precision IttyBitty Thermal Supervisor

MIC280
Micrel
Symbol
Parameter
Condition
Min Typ Max Units
Serial Data I/O Pin, DATA
V_OL
Low Output Voltage, Note 4
V_IL
Low Input Voltage
V_IH
High Input Voltage
C_IN
Input Capacitance
I_LEAK
Input Current
Serial Clock Input, CLK
I_OL = 3mA
I_OL = 6mA
3V ≤ V_DD ≤ 3.6V
3V ≤ V_DD ≤ 3.6V
Note 5
0.3
V
0.5
V
0.8
V
2.1
5.5
V
10
pF
±1
µA
V_IL
Low Input Voltage
V_IH
High Input Voltage
C_IN
Input Capacitance
I_LEAK
Input Current
Interrupt Output, /INT
3V ≤ V_DD ≤ 3.6V
3V ≤ V_DD ≤ 3.6V
Note 5
0.8
V
2.1
5.5
V
10
pF
±1
µA
V_OL
Low Output Voltage, Note 4
t_INT
Interrupt Propagation Delay
Notes 5, 6
t_nINT
Interrupt Reset Propagation Delay
Note 5, 9
I_LEAK
Serial Interface Timing
I_OL = 3mA
I_OL = 6mA
from TEMPx < TLOWx or
TEMPx > THIGHx or TEMPx >
CRITx to /INT < V_OL; R_PULLUP = 10kΩ
from read of STATUS or A.R.A. to
/INT > V_OH; R_PULLUP = 10kΩ
0.3
V
0.5
V
[t_CONV] ms
1
µs
±1
µA
t₁
CLK (Clock) Period
t₂
Data In Setup Time to CLK High
t₃
Data Out Stable after CLK Low
t₄
Data Low Setup Time to CLK Low Start Condition
t₅
Data High Hold Time after CLK
Stop Condition
High
2.5
µs
100
ns
300
ns
100
ns
100
ns
t_TO
Bus Timeout
25
30
35
ms
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating range. Final test on outgoing product is performed at T_A = 25°C.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4. Current into the /INT or DATA pins will result in self heating of the device. Sink current should be minimized for best accuracy.
Note 5. Guaranteed by design over the operating temperature range. Not 100% production tested.
Note 6.
Note 7.
Note 8.
t_INT and t_CRIT are equal to t_CONV.
T_D is the temperature of the remote diode junction. Testing is performed using a single unit of one of the transistors listed in Table 8.
t_CONV = t_CONV(local) + t_CONV(remote). Following the acquisition of either remote or local temperature data, the limit comparisons for that zone
are performed and the device status updated; Status bits will be set and /INT driven active, if applicable.
Note 9. The interrupt reset propogation delay is dominated by the capacitance on the bus.
Note 10. Accuracy specification does not include quantization noise, which may be up to ±¹/₂ LSB.
Note 11. Tested at 10-bit resolution.
MIC280
4
May 2006