KSZ8051MNL Datasheet, PDF (35/59 Pages) Micrel Semiconductor – 10Base-T/100Base-TX Physical Layer Transceiver

Micrel, Inc.
Register Description (Continued)
Address
Name
Description
Register 0h – Basic Control
0.11
Power Down
0.10
Isolate
1 = Power down mode
0 = Normal operation
If software reset (register 0.15) is used to exit
Power Down mode (register 0.11 = 1), two
software reset writes (register 0.15 = 1) are
required. First write clears Power Down mode;
second write resets chip and re-latches the pin
strapping pin values.
1 = Electrical isolation of PHY from MII
0 = Normal operation
Mode⁽¹⁾
RW
RW
0.9
Restart Auto- 1 = Restart auto-negotiation process
Negotiation _{0 = Normal operation.}
RW/SC
This bit is self-cleared after a ‘1’ is written to it.
0.8
Duplex Mode 1 = Full-duplex
RW
0 = Half-duplex
0.7
0.6:0
Collision Test
Reserved
1 = Enable COL test
0 = Disable COL test
Register 1h – Basic Status
1.15
100Base-T4
1.14
1.13
1.12
1.11
1.10:7
1.6
100Base-TX
Full Duplex
100Base-TX
Half Duplex
10Base-T Full
Duplex
10Base-T Half
Duplex
Reserved
No Preamble
1.5
Auto-
Negotiation
Complete
1.4
Remote Fault
1.3
Auto-
Negotiation
Ability
1 = T4 capable
0 = Not T4 capable
1 = Capable of 100Mbps full-duplex
0 = Not capable of 100Mbps full-duplex
1 = Capable of 100Mbps half-duplex
0 = Not capable of 100Mbps half-duplex
1 = Capable of 10Mbps full-duplex
0 = Not capable of 10Mbps full-duplex
1 = Capable of 10Mbps half-duplex
0 = Not capable of 10Mbps half-duplex
1 = Preamble suppression
0 = Normal preamble
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
1 = Remote fault
0 = No remote fault
1 = Capable to perform auto-negotiation
0 = Not capable to perform auto-negotiation
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO/LH
RO
KSZ8051MNL/RNL
Default
0
Set by ISO strapping pin.
See “Strapping Options” section
for details.
0
Inverse of DUPLEX strapping pin
value.
See “Strapping Options” section
for details.
0
000_0000
0
1
1
1
1
0000
1
0
0
1
July 2010
35
M9999-070910-1.0