MIC2155_0911 Datasheet, PDF (34/35 Pages) Micrel Semiconductor – Two-Phase, Single-Output, PWM Synchronous Buck Control IC

Micrel, Inc.
Ceramic capacitors are recommended for most
decoupling and filtering applications because of their low
impedance and small size. Depending on the
application, most dielectrics (X5R, X7R, NPO) are
acceptable, however, Z5U type ceramic capacitor
dielectrics are not recommended due to their large
change in capacitance over temperature and voltage.
Design and Layout Checklist
• Ceramic capacitor placed between the HS FET drain
and the LSFET source.
• MOSFET gate drive traces must be low inductance
and routed away from noise sensitive analog signals,
components and ground planes.
• The signal and power ground planes must be
separated to prevent high current and fast switching
signals from interfering with the low level, noise
sensitive analog signals. These planes should be
connected at only 1 point, next to the MIC2155/6
controller.
• The following signals and their components should be
decoupled or referenced to the power ground plane:
VIN1, VIN2, VDD, PGND1, PGND2
MIC2155/2156
• These analog signals should be referenced or
decoupled to the analog ground plane:
AVDD, SYNC, EN, SS, PGOOD, COMP1, COMP2,
FB2, EA2, VOUT, FB1, AGND
• Place the current sharing RC components (that
connect across the inductor) and any related filtering
components close to the FB2, EA2+ and VOUT pins
(18, 17, 20). The traces connecting the inductors and
these components should be routed close together to
minimize pickup or EMI radiation.
• Place the overcurrent sense resistor close to the CS1
pin (pin 4). The trace coming from the switch node to
this resistor has high dv/dt and should be routed away
from other noise sensitive components and traces.
• The remote sense traces must be routed close
together or on adjacent layers to minimize noise
pickup. The traces should be routed away from the
switch node, inductors, MOSFETs and other high
dv/dt or di/dt sources.
November 2009
34
M9999-111209-B