PL602081UMG Datasheet, PDF (3/15 Pages) Micrel Semiconductor – PCIe Octal, Ultra-Low Jitter, HCSL Frequency Synthesizer

Micrel, Inc.
Pin Configuration
PL60208X
Pin Description
Pin Number
1, 2
4, 5
7, 8
25, 26
28, 29
32, 33
35, 36
41, 42
14
12, 13
31, 37, 38
16, 43, 44
21, 23
24, 39
3, 6, 40
Pin Name
/Q5, Q5
/Q6, Q6
/Q7, Q7
/Q0, Q0
/Q1, Q1
/Q2, Q2
/Q3, Q3
/Q4, Q4
FSEL
VDD
VDDO1
VDDO2
VSS
(exposed
pad)
VSSO1
VSSO2
Pin Type
O, (DIF)
I, (SE)
PWR
PWR
PWR
PWR
PWR
PWR
44-Pin QFN
(Top View)
Pin Level
Pin Name
HCSL
Differential clock output.
LVCMOS
Frequency select, 1 = 100MHz, 0 = 200MHz, 45KΩ pull-up.
Power supply.
Power supply for outputs Q0 – Q3.
Power supply for outputs Q4 – Q7.
Core power supply ground. The exposed pad must be
connected to the VSS ground plane.
Power supply ground for outputs Q0 – Q3.
Power supply ground for outputs Q4 – Q7.
December 11, 2013
3
Revision 1.1
[e-mail] or [phone]