PL602081UMG Datasheet, PDF (13/15 Pages) Micrel Semiconductor – PCIe Octal, Ultra-Low Jitter, HCSL Frequency Synthesizer

Micrel, Inc.
Application Information
Input Reference
When operating with a crystal input reference, do not
apply a switching signal to REF_IN.
Crystal Layout
Keep the layers under the crystal as open as possible
and do not place switching signals or noisy supplies
under the crystal.
Crystal load capacitance is built inside the die so no
external capacitance is needed. See the Selecting a
Quartz crystal for the Clockworks Flex I Family of
Precision Synthesizers application note for further details.
Contact Micrel’s TCG applications group if you need
assistance on selecting a suitable crystal for your
application at: [e-mail].
PL60208X
Power Supply Decoupling
Place the smallest value decoupling capacitor (4.7nF
above) between the VDD and VSS pins, as close as
possible to those pins and at the same side of the PCB
as the IC. The shorter the physical path from VDD to
capacitor and back from capacitor to VSS, the more
effective the decoupling. Use one 4.7nF capacitor for
each VDD pin on the PL60208X.
HCSL Outputs
HCSL outputs are to be terminated with 50Ω to VSS. For
best performance load all outputs. If you want to AC-
couple or change the termination, contact Micrel’s
application group at: [e-mail].
December 11, 2013
13
Revision 1.1
[e-mail] or [phone]