MIC2555_06 Datasheet, PDF (24/29 Pages) Micrel Semiconductor – USB – OTG Transceiver

Micrel, Inc.
MIC2555
Interrupt Source Register
Interrupt Status
vbus_vld
1
rd
sess_vld
se_dp
id_gnd_in
se_dm
id_float
1
rd
1
rd
1
rd
1
rd
1
rd
bdis_acon
(sess_end)
1
rd
cr_int
1
rd
rd - 08h
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Indicates the current state of signals that can
generate an interrupt.
1 = V_BUS > 4.4V
(VBUS valid comparator)
1 = 0.8V< V_BUS< 2.0V.
(Session valid comparator)
1 = D+ pin is HIGH
1 = ID pin grounded
1 = D- pin is HIGH
1 = ID pin floating
If: bdis_acon_en = 1
1 = SE0 has been detected, transceiver asserted
dp_pullup after detecting B-device disconnect.
If bdis_acon_en = 0, sess_end_en = 1
1 = V_BUS < 0.8V. (Session End comparator output =
TRUE)
1 = car kit interrupt, D+ pin has seen a pulse above
the interrupt level
Interrupt Latch 1
Interrupt Source
Vbus_vld
1
sess_vld
1
se_dp
1
id_gnd_in
1
se_dm
1
id_float
1
bdis_acon
(sess_end)
1
cr_int
1
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
set –0Ah
clr – 0Bh
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Indicates which sources have interrupted. 1 =
interrupt.
Interrupt Mask False
False
Interrupt Mask
Vbus_vld
1
sess_vld
1
se_dp
1
id_gnd_in
1
se_dm
1
id_float
1
bdis_acon
(sess_end)
1
cr_int
1
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
rd/s/c
set – 0Ch
clr – 0Dh
bit 0
bit 1
bit 2
bit 3
bit 4
bit 5
bit 6
bit 7
Enables interrupts on transition from TRUE to FALSE
1 Æset = 1, Interrupt on TÆF.
1 Æclr = 0, no interrupt.
December 2006
24
M9999-121406