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KSZ8851-16MQL Datasheet, PDF (21/89 Pages) Micrel Semiconductor – Single-Port Ethernet MAC Controller with 8/16-Bit or 32-Bit Non-PCI Interface
Micrel, Inc.
KSZ8851-16/32 MQL/MQLI
Pin Number
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
Pin Name
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
DGND
DGND
VDDIO
D2
D1
D0
Type
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
I/O (pd)
Gnd
Gnd
P
I/O (pd)
I/O (pd)
I/O (pd)
Pin Function
Data bus bit 14
Data bus bit 13
Data bus bit 12
Data bus bit 11
Data bus bit 10
Data bus bit 9
Data bus bit 8
Data bus bit 7
Data bus bit 6
Data bus bit 5
Data bus bit 4
Data bus bit 3
Digital IO ground
Digital core ground
3.3V, 2.5V or 1.8V digital VDDIO input power supply for IO with well decoupling capacitors.
Data bus bit 2
Data bus bit 1
Data bus bit 0
Legend:
P = Power supply Gnd = Ground
I/O = Bi-directional I = Input O = Output.
Ipd = Input with internal pull-down (58K +/-30%).
Ipu = Input with internal pull-up (58K +/-30%).
Opd = Output with internal pull-down (58K +/-30%).
Opu = Output with internal pull-up (58K +/-30%).
Ipu/O = Input with internal pull-up (58K +/-30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (58K +/-30%) during power-up/reset; output pin otherwise.
I/O (pd) = Input/Output with internal pull-down (58K ±30%).
Strapping Options
Pin Number
29
Pin Name
EESK
30
EEDI
Type
Ipd/O
Ipd
Pin Function
Endian mode select:
Pull-up = Big Endian
Pull-down (default) = Little Endian
During power-up / reset, this pin value is latched into register CCR, bit 10.
When this pin is no connect or tied to GND, the bit 11 (Endian mode selection) in
RXFDPR register can be used to program either Little (bit11=0 default) Endian mode or
Big (bit11=1) Endian mode.
Bus mode select for KSZ8851M when EEEN pin is pull-down without EEPROM
Pull-up = 16-bit bus mode
Pull-down or No connect (default) = 8-bit bus mode
This pin is “don’t care” (no connect) for 32-bit bus mode when EEEN is pull-down
(without EEPROM).
During power-up / reset, this pin value is latched into register CCR bit 6/7.
Note: Ipu/O = Input with internal pull-up (58K +/-30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (58K +/-30%) during power-up/reset; output pin otherwise.
Pin strap-ins are latched during power-up or reset.
August 2009
21
M9999-083109-2.0