MIC24046-H Datasheet, PDF (17/24 Pages) Micrel Semiconductor – Pin-Programmable, 4.5V − 19V, 5A Step-Down Converter

Micrel, Inc.
Figure 6. Simplified Small-Signal Model
of the Voltage Regulation Loop
This simplified approach disregards all issues related to
the inner current loop, like its stability and bandwidth.
This approximation is good enough for most operating
scenarios, where the voltage-loop bandwidth is not
pushed to aggressively high frequencies.
Based on the model shown in Figure 6, the control-to-
output transfer function is:
G_CO(S)
=
V_O(S)
V_C(S)
= Gm_PS
× R_L
×
^{1 +}
_{1 +}
2π
s
×
f_Z

2π
s
×
f_P

Eq. 14
where:
f_Z and f_P = The frequencies associated with the output
capacitor ESR zero and with the load pole, respectively:
f_Z
=
1
2π × C_O × ESR
Eq. 15
f_P
=
2π × C_O
1
× (ESR
+ R_L )
Eq. 16
MIC24046-H
The MIC24046-H uses a transconductance (Gm_EA =
1.5mA/V) error amplifier. Frequency compensation is
implemented with a Type-II network (R_C1, C_C1, and C_C2)
connected from COMP to AGND. The compensator
transfer function consists of an integrator for zero DC
(voltage regulation error), of one zero to boost the phase
margin of the overall loop gain around the crossover
frequency and one additional pole that can be used to
cancel the output capacitor ESR zero, or to further
attenuate switching frequency ripple. In both cases, the
additional pole makes the regulation loop less susceptible
to switching frequency noise. The additional pole is
created by capacitor C_C2. The compensator transfer
function H_C(S) (from OUTSNS to COMP) is as Equation
17:
H _C(S)
=
−
R1
R1+ R2
× Gm_EA
×
1
S × (C_C1 +
C_C2 )
× ^{(1+ S × RC1 × CC1)}
^{1 +}
S
×
R _C1
×
C_C1
C_C1
×
+
C_C2
C_C2

Eq. 17
The overall voltage loop gain T_V(S) is the product of the
control-to-output and of the compensator transfer
functions:
T_V(S) = G_CO(S) × H_C(S)
Eq. 18
The value of the attenuation ratio R1/(R1 + R2) depends
on the output voltage selection, and can be retrieved as
illustrated in Table 5:
Table 5. Internal Feedback Divider Attenuation Values
VO Range
R1/(R1 + R2)
A
(A = 1 + R2/R1)
0.7V − 1.2V
1
1
1.5V − 1.8V
0.5
2
2.5V(2.49V) − 3.3V
0.333
3
July 7, 2015
17
Revision 1.1