MIC25400 Datasheet, PDF (16/27 Pages) Micrel Semiconductor – 2A Dual Output PWM Synchronous Buck Regulator IC

Micrel, Inc.
Proper snubber design requires the parasitic inductance
and capacitance be known. A method of determining
these values and calculating the damping resistor value
is outlined below.
1. Measure the ringing frequency at the switch node
which is determined by parasitic L_P and C_P. Define this
frequency as f₁.
2. Add a capacitor C_S (normally at least 3 times as big as
the C_OSS of the FET) from the switch node-to-ground and
measure the new ringing frequency. Define this new
(lower) frequency as f₂. L_P and C_P can now be solved
using the values of f₁, f₂ and C_S.
3. Add a resistor R_S in series with C_S to generate critical
damping.
Step 1: First measure the ringing frequency on the
switch node voltage when the high-side MOSFET turns
on. This ringing is characterized by the equation:
f₁ =
1
2π L_P ⋅ C_P
Where:
C_P and L_P are the parasitic capacitance and inductance
Step 2: Add a capacitor, C_S, in parallel with the
synchronous MOSFET, Q2. The capacitor value should
be approximately 3 times the C_OSS of Q2. Measure the
frequency of the switch node ringing, f_2.
f₂ =
2π
1
L_P ⋅ (C_S + C_P )
Define f’ as:
f' = ^f1
f₂
Combining the equations for f₁, f₂ and f’ to derive C_P, the
parasitic capacitance
C_P
=
C_S
2 ⋅ (f ^' )²
−1
L_P is solved by re-arranging the equation for f₁.
L_P
=
(2π)²
1
⋅ C_P
⋅ (f₁)²
Step 3: Calculate the damping resistor.
Critical damping occurs at Q=1
Q= ¹
L_{P = 1}
R_S C_S + C_P
MIC25400
Solving for R_S
R_S =
L_P
C_S + C_P
Figure 11 shows the snubber in the circuit and the
damped switch node waveform.
The snubber capacitor, Cs, is charged and discharged
each switching cycle. The energy stored in Cs is
dissipated by the snubber resistor, Rs, two times per
switching period. This power is calculated in the
equation below.
P_snubber = f_S ⋅ C_S ⋅ V_IN2
Where:
f_S is the switching frequency for each phase
V_IN is the DC input voltage
Low-side MOSFET Selection
An external N-channel logic level power MOSFET must
be used for the low-side switch. The MOSFET gate-to-
source drive voltage of the MIC25400 is regulated by an
internal 5V regulator. Logic level MOSFETs, whose
operation is specified at V_GS = 4.5V must be used. Use
of MOSFETs with a lower specified V_GS (such as 3.3V or
2.5V) are not recommended since the low threshold can
cause them to turn on when the high-side FET is turning
on. When operating the regulator below a 6V input,
connect V_DD to V_IN to prevent the V_DD regulator from
dropping out.
Total gate charge is the charge required to turn the
MOSFET on and off under specified operating conditions
(V_DS and V_GS). The gate charge is supplied by the
regulator’s gate drive circuit. Gate charge is a source of
power dissipation in the regulator due to the high
switching frequencies. At low output load this power
dissipation is noticeable as a reduction in efficiency. The
average current required to drive the MOSFETs is:
I_DD = Q_G ⋅ f_S
Where:
Q_G is the gate charge for both of the external MOSFETs.
This information should be obtained from the
manufacturer’s data sheet.
Since current from the gate drive is supplied by the input
voltage, power dissipated in the MIC25400 due to gate
drive is:
P_{GATE_DRIVE} = Q_G ⋅ f_S ⋅ V_IN
Parameters that are important to MOSFET selection are:
• Voltage rating
• On resistance
• Total Gate Charge
January 2011
16
M9999-020111-C