MIC2150 Datasheet, PDF (14/27 Pages) Micrel Semiconductor – 2-Phase Dual Output PWM Synchronous Buck Control IC

Micrel, Inc.
switching) cycle.
i.e., Δ_BST = 10mA×1.6µs / 100nF = 160mV. For most
applications, 220nF should be used to achieve an
improved, lower droop. When the low-side driver turns
on every switching cycle, any lost charge from C_BST is
replaced via D_BST as it becomes forward biased.
Therefore minimum BST voltage is V_DD – 0.5V.
The Low-side driver is supplied directly from V_DD at
nominal 5V.
Adaptive Gate Drive
Figure 8. Adaptive Gate Drive Diagram
MIC2150
There is a period when both driver outputs are held off
(‘dead time’) to prevent shoot-through current flowing.
Shoot-through current flows if both MOSFETS are on
momentarily as the cycle’s crossover. This dead time
must be kept to a minimum to reduce losses in the catch
diode which could either be an external Schottky diode
placed across the lower MOSFET or the internal
Schottky diode implemented in some MOSFETs. It is not
recommended for high current designs, to rely on the
intrinsic body diode of the power MOSFET; these
typically have large V_F values and a slow reverse
recovery characteristic which will add significant losses
to the regulator. Dependent on the MOSFETs used, the
dead time could be required to be 150ns or 20ns. The
MIC2150 solves this variability issue by using an
adaptive gate-drive scheme:
When the high-side driver is turned off, naturally the
inductor forces the voltage at the switching node (low-
side MOSFET drain) towards ground to keep current
flowing. When the SW pin is detected to have reached
1.5V, the top MOSFET can be assumed to be off and
the low-side driver output is immediately turned on.
There is also a short delay between the low-side drive
turning off and the high-side driver turning on. This is
fixed at ~60ns to 100ns to allow for large gate charge
MOSFETs to be used.
August 2009
14
M9999-082809-A
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