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MIC2150 Datasheet, PDF (12/27 Pages) Micrel Semiconductor – 2-Phase Dual Output PWM Synchronous Buck Control IC
Micrel, Inc.
circuit acts to provide a fixed maximum output current
until the resistance of the load is so low that the voltage
across it is no longer within regulation limits. At this point
(75% of nominal output voltage), Hiccup current mode is
initiated to protect down-stream loads from excessive
current during hard short circuits and also reduces
overall power dissipation in the PWM converter
components during a fault. Before hiccup current mode
occurs, ‘brick wall’ current limiting is provided to prevent
system shutdown or disturbance if the overload is only
marginal.
Figure 4. Overcurrent Sensing
During the normal operation of a synchronous Buck
regulator, as the lower MOSFET is switched on, its drain
voltage will become negative with respect to ground as
the inductor current continues to flow from Source to
Drain. This negative voltage is proportional to output
load current, inductor ripple current and MOSFET RDSON.
MIC2150
pulse is missed and so on. Thus reducing the overall
energy transferred to the output and VOUT starts to fall.
As this successive missing of pulses results in an
effectively lower switching frequency, power inductor
ripple currents can get very high if left unlimited. The
MIC2150 therefore limits Duty Cycle during current limit
to prevent currents building up in the power inductor and
output capacitors.
Current-Limit Setting
The current limit circuit responds to the peak inductor
current flowing through the low-side FET. The value of
RCS can be estimated with the “simple” method or can be
more accurately calculated by taking the inductor ripple
current into account.
The Simple Method
Current limit can be quickly estimated with the following
equation:
RCS = IOUT×RDSON(MAX)/200µA.
Where: RDSON is the maximum on-resistance of the low
side FET at the operating junction temperature
Accurate Method
For designs where ripple current is significant when
compared to IOUT or for low duty cycle operation,
calculating the current setting resistor RCS should take
into account that one is sensing the peak inductor
current and that there is a blanking delay of
approximately 100ns.
Figure 5. Current Sensing Waveforms
The larger inductor current, the more negative VDS
becomes. This is utilized for the detection of over current
by passing a known fixed current source (200µA)
through a resistor RCS which sets up an offset voltage
(ICS×RCS). When ISD (Source to Drain current)×RDSON is
equal to this voltage, the MIC2150’s over current trigger
is set. This disables the next high-side gate drive pulse.
After missing the high-side pulse, the over current (OC)
trigger is reset. If, on the next low-side drive cycle, the
current is still too high i.e., VCS is ≤ 0V, another high-side
Figure 6. Overcurrent-Circuit Waveform
Calculate peak switch current
IPK
= IOUT
+ IRIPPLE
2
Where:
IRIPPLE
=
VOUT × (1− D)
FS × L
Now calculate the actual set point to allow for the 100ns
delay.
August 2009
12
M9999-082809-A
(408) 944-0800